SINTERED SOLDER FOR FINE PITCH FIRST-LEVEL INTERCONNECT (FLI) APPLICATIONS

SINTERED SOLDER FOR FINE PITCH FIRST-LEVEL INTERCONNECT (FLI) APPLICATIONS

Foundation layers and methods of forming a foundation layer are described. Die pads are formed over a die. A dielectric layer is formed over die pads and the die. The dielectric layer is then recessed to expose top portions of the die pads. A first plurality of sintered conductive vias are formed ov...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SUBRAMANIAN, Vijay Krishnan (Vijay), PATEL, Neha M, RARAVIKAR, Nachiket R, HACKENBERG, Ken P, OKA, Mihir A
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Foundation layers and methods of forming a foundation layer are described. Die pads are formed over a die. A dielectric layer is formed over die pads and the die. The dielectric layer is then recessed to expose top portions of the die pads. A first plurality of sintered conductive vias are formed over the die pads. The first sintered conductive vias are coupled to at least one of the die pads. In addition, a photoresist layer may be formed over the dielectric layer and the top portions of the die pads. Via openings are formed in the photoresist layer. A second plurality of sintered conductive vias may then be formed over the first sintered conductive vias to form a plurality of sintered conductive lines. Each of the first and second sintered conductive vias are formed with a liquid phase sintering (LPS) solder paste.