THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 μm.

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Hauptverfasser:	Chen, Yi-Hsiu, Ko, Jia-Ling, Liao, Ebin, Chiou, Wen-Chih, Shih, Hong-Ye
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	Chen, Yi-Hsiu Ko, Jia-Ling Liao, Ebin Chiou, Wen-Chih Shih, Hong-Ye
description	Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 μm.
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title	THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE AND METHOD OF MANUFACTURING THE SAME
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