LOW LATENCY CORRUPT DATA TAGGING ON A CROSS-CHIP LINK

Low latency corrupt data tagging on a cross-chip link including receiving, from the cross-chip link, a control flit comprising a virtual channel identifier for an incoming data flit; storing the virtual channel identifier in a data pipeline and a bad data indicator (BDI) pipeline; receiving, from th...

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Bibliographische Detailangaben

Hauptverfasser:	STEFFEN, CHRISTOPHER W, WOLLBRINK, CURTIS C, OLLERICH, NICHOLAS J, ALBERTSON, CHAD M, CAMPBELL, ERIC J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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