TECHNOLOGIES FOR VERIFYING MEMORY INTEGRITY ACROSS MULTIPLE MEMORY REGIONS

Technologies for verifying the integrity of regions of physical memory allocated among multiple domains are described. In embodiments the technologies include or cause: the generation of a first integrity value in response to a write command from a first domain; the generation of a second integrity...

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Hauptverfasser:	Chhabra, Siddhartha, Von Bokern, Vincent
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator	Chhabra, Siddhartha Von Bokern, Vincent
description	Technologies for verifying the integrity of regions of physical memory allocated among multiple domains are described. In embodiments the technologies include or cause: the generation of a first integrity value in response to a write command from a first domain; the generation of a second integrity value in response to a read command; and verifying the integrity of read data targeted by the read command at least in part by comparing the first integrity value to the second integrity value.
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subjects	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title	TECHNOLOGIES FOR VERIFYING MEMORY INTEGRITY ACROSS MULTIPLE MEMORY REGIONS
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