STRESS-IMPAIRED SIGNAL CORRECTION CIRCUIT
In a system and method for correcting a stress-impaired signal in a circuit, a calibration circuit produces a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a vol...
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creator | LAZAROV, Kalin V Chiacchia, Robert C |
description | In a system and method for correcting a stress-impaired signal in a circuit, a calibration circuit produces a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a voltage proportional to absolute temperature. A set of reference values are generated based on these voltages. A gain correction factor is calculated based on a function of the set of reference values and a set of temperature-dependent values, and the stress-impaired signal is corrected based on the gain correction factor. |
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subjects | BASIC ELECTRIC ELEMENTS CONTROLLING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS REGULATING SEMICONDUCTOR DEVICES SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES TESTING |
title | STRESS-IMPAIRED SIGNAL CORRECTION CIRCUIT |
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