SECURE MEMORY IMPLEMENTATION FOR SECURE EXECUTION OF VIRTUAL MACHINES

Secure memory implementation for secure execution of virtual machines. Data is processed in a first mode and a second mode, and commands are sent to a chip interconnect bus using real addresses, wherein the chip interconnect bus includes a number of bits for the real addresses. A memory controller i...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Hall, William E, Kalla, Ronald N, Hunt, Guerney D. H, Starke, William J, Leenstra, Jentje, Stuecheli, Jeffrey A, Mackerras, Paul
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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