IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE

IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE

A method and circuit for implementing a level shifter for translating logic signals to output voltage analog levels, and a design structure on which the subject circuit resides are provided. The circuit includes a level shifter resistor divider string of a plurality of series connected resistors, th...

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Hauptverfasser: Friend, David M, Strom, James D, Davies, Andrew D, Kesselring, Grant P
Format: Patent
Sprache:eng
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BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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creator Friend, David M
Strom, James D
Davies, Andrew D
Kesselring, Grant P
description A method and circuit for implementing a level shifter for translating logic signals to output voltage analog levels, and a design structure on which the subject circuit resides are provided. The circuit includes a level shifter resistor divider string of a plurality of series connected resistors, the level shifter resistor divider string is connected between an analog voltage rail and an analog ground. A plurality of level shifter cascaded inverters are connected between respective resistors of the level shifter resistor divider string and an analog voltage rail and an analog ground. An output of the level shifter is programmed by the level shifter resistor divider string connected to the cascaded inverters.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018358969A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018358969A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018358969A13</originalsourceid><addsrcrecordid>eNrjZDD19A3wcfV19Qvx9HNXcHYMdnZ0cVXwcQ1z9VEI9vB0C3ENUnDzD1Jw9HP08XdXCPP3CXF0d-VhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhbGphaWZpaOhsbEqQIAg2comw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE</title><source>esp@cenet</source><creator>Friend, David M ; Strom, James D ; Davies, Andrew D ; Kesselring, Grant P</creator><creatorcontrib>Friend, David M ; Strom, James D ; Davies, Andrew D ; Kesselring, Grant P</creatorcontrib><description>A method and circuit for implementing a level shifter for translating logic signals to output voltage analog levels, and a design structure on which the subject circuit resides are provided. The circuit includes a level shifter resistor divider string of a plurality of series connected resistors, the level shifter resistor divider string is connected between an analog voltage rail and an analog ground. A plurality of level shifter cascaded inverters are connected between respective resistors of the level shifter resistor divider string and an analog voltage rail and an analog ground. An output of the level shifter is programmed by the level shifter resistor divider string connected to the cascaded inverters.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181213&amp;DB=EPODOC&amp;CC=US&amp;NR=2018358969A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181213&amp;DB=EPODOC&amp;CC=US&amp;NR=2018358969A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Friend, David M</creatorcontrib><creatorcontrib>Strom, James D</creatorcontrib><creatorcontrib>Davies, Andrew D</creatorcontrib><creatorcontrib>Kesselring, Grant P</creatorcontrib><title>IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE</title><description>A method and circuit for implementing a level shifter for translating logic signals to output voltage analog levels, and a design structure on which the subject circuit resides are provided. The circuit includes a level shifter resistor divider string of a plurality of series connected resistors, the level shifter resistor divider string is connected between an analog voltage rail and an analog ground. A plurality of level shifter cascaded inverters are connected between respective resistors of the level shifter resistor divider string and an analog voltage rail and an analog ground. An output of the level shifter is programmed by the level shifter resistor divider string connected to the cascaded inverters.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD19A3wcfV19Qvx9HNXcHYMdnZ0cVXwcQ1z9VEI9vB0C3ENUnDzD1Jw9HP08XdXCPP3CXF0d-VhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhbGphaWZpaOhsbEqQIAg2comw</recordid><startdate>20181213</startdate><enddate>20181213</enddate><creator>Friend, David M</creator><creator>Strom, James D</creator><creator>Davies, Andrew D</creator><creator>Kesselring, Grant P</creator><scope>EVB</scope></search><sort><creationdate>20181213</creationdate><title>IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE</title><author>Friend, David M ; Strom, James D ; Davies, Andrew D ; Kesselring, Grant P</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018358969A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>Friend, David M</creatorcontrib><creatorcontrib>Strom, James D</creatorcontrib><creatorcontrib>Davies, Andrew D</creatorcontrib><creatorcontrib>Kesselring, Grant P</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Friend, David M</au><au>Strom, James D</au><au>Davies, Andrew D</au><au>Kesselring, Grant P</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE</title><date>2018-12-13</date><risdate>2018</risdate><abstract>A method and circuit for implementing a level shifter for translating logic signals to output voltage analog levels, and a design structure on which the subject circuit resides are provided. The circuit includes a level shifter resistor divider string of a plurality of series connected resistors, the level shifter resistor divider string is connected between an analog voltage rail and an analog ground. A plurality of level shifter cascaded inverters are connected between respective resistors of the level shifter resistor divider string and an analog voltage rail and an analog ground. An output of the level shifter is programmed by the level shifter resistor divider string connected to the cascaded inverters.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title IMPLEMENTING CASCADE LEVEL SHIFTER FOR ANALOG VOLTAGE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T08%3A01%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Friend,%20David%20M&rft.date=2018-12-13&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2018358969A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true