SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS
In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch re...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | MARKS, Kevin T IYER, Shyam T RAMASWAMY, Srikrishna |
description | In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch requests; analyzing metadata associated with each of the plurality of command fetch requests in order to serialize the plurality of command fetch requests in a chronological order; and communicating the coalesced command fetch requests in the chronological order to a memory having stored thereon commands responsive to the coalesced command fetch requests. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018335953A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018335953A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018335953A13</originalsourceid><addsrcrecordid>eNqNjLEKwjAQQLs4iPoPAeeANQg6XpOrKbQJ3F0Vp1IkDiJaqP-PWPwAp7e89-bZnS8s2LCC4FSD4qNjVUZSHsidgVAXwOgUQeUUWIs1EkgVwySdgCooatQ1hqP4aRJb0bHUkRySEoLAYL8BL7PZrX-MafXjIluXKNbrNLy6NA79NT3Tu2t5u8n3xuwOOwO5-c_6AE9rNwg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS</title><source>esp@cenet</source><creator>MARKS, Kevin T ; IYER, Shyam T ; RAMASWAMY, Srikrishna</creator><creatorcontrib>MARKS, Kevin T ; IYER, Shyam T ; RAMASWAMY, Srikrishna</creatorcontrib><description>In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch requests; analyzing metadata associated with each of the plurality of command fetch requests in order to serialize the plurality of command fetch requests in a chronological order; and communicating the coalesced command fetch requests in the chronological order to a memory having stored thereon commands responsive to the coalesced command fetch requests.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181122&DB=EPODOC&CC=US&NR=2018335953A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181122&DB=EPODOC&CC=US&NR=2018335953A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MARKS, Kevin T</creatorcontrib><creatorcontrib>IYER, Shyam T</creatorcontrib><creatorcontrib>RAMASWAMY, Srikrishna</creatorcontrib><title>SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS</title><description>In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch requests; analyzing metadata associated with each of the plurality of command fetch requests in order to serialize the plurality of command fetch requests in a chronological order; and communicating the coalesced command fetch requests in the chronological order to a memory having stored thereon commands responsive to the coalesced command fetch requests.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEKwjAQQLs4iPoPAeeANQg6XpOrKbQJ3F0Vp1IkDiJaqP-PWPwAp7e89-bZnS8s2LCC4FSD4qNjVUZSHsidgVAXwOgUQeUUWIs1EkgVwySdgCooatQ1hqP4aRJb0bHUkRySEoLAYL8BL7PZrX-MafXjIluXKNbrNLy6NA79NT3Tu2t5u8n3xuwOOwO5-c_6AE9rNwg</recordid><startdate>20181122</startdate><enddate>20181122</enddate><creator>MARKS, Kevin T</creator><creator>IYER, Shyam T</creator><creator>RAMASWAMY, Srikrishna</creator><scope>EVB</scope></search><sort><creationdate>20181122</creationdate><title>SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS</title><author>MARKS, Kevin T ; IYER, Shyam T ; RAMASWAMY, Srikrishna</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018335953A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MARKS, Kevin T</creatorcontrib><creatorcontrib>IYER, Shyam T</creatorcontrib><creatorcontrib>RAMASWAMY, Srikrishna</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MARKS, Kevin T</au><au>IYER, Shyam T</au><au>RAMASWAMY, Srikrishna</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS</title><date>2018-11-22</date><risdate>2018</risdate><abstract>In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch requests; analyzing metadata associated with each of the plurality of command fetch requests in order to serialize the plurality of command fetch requests in a chronological order; and communicating the coalesced command fetch requests in the chronological order to a memory having stored thereon commands responsive to the coalesced command fetch requests.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2018335953A1 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | SYSTEMS AND METHODS FOR HARDWARE-BASED RAID ACCELERATION FOR VARIABLE-LENGTH AND OUT-OF-ORDER TRANSACTIONS |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T19%3A27%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MARKS,%20Kevin%20T&rft.date=2018-11-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2018335953A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |