3D-INTERCONNECT

A method of making a microelectronic package includes bonding a conductive structure to a carrier so that the conductive structure overlies a rear surface of a microelectronic element disposed on the carrier and an exposed top surface of the carrier. The conductive structure may be a monolithic stru...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Low, Qwai H, Variot, Patrick, Chia, Chok J
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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