CONFIGURABLE HARDWARE QUEUE MANAGEMENT
A system for managing one or more queues in a multi-processor environment includes a queue manager disposed in communication with a plurality of processors and a memory shared by the plurality of processors, and a queue configured to be controlled by the queue manager, the queue including independen...
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creator | Grassi, Michael Higgs, Raymond M Bubb, Clinton E Hopkins, Luke M Pospesel, Kirk Aden, Steven G Haynie, Howard M Tarr, Gabriel M |
description | A system for managing one or more queues in a multi-processor environment includes a queue manager disposed in communication with a plurality of processors and a memory shared by the plurality of processors, and a queue configured to be controlled by the queue manager, the queue including independent and discrete queue elements and having a starting location specified by a base address, the queue manager having one or more dynamically configurable parameters, the one or more dynamically configurable parameters including a size of each of the queue elements. The queue manager is configured to perform receiving a message from a processor of the plurality of processors, the message including an operation address specifying a fixed storage location in the memory and a request related to accessing the memory, selecting the queue based on the operation address, and performing a queuing operation on the queue based on the request. |
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The queue manager is configured to perform receiving a message from a processor of the plurality of processors, the message including an operation address specifying a fixed storage location in the memory and a request related to accessing the memory, selecting the queue based on the operation address, and performing a queuing operation on the queue based on the request.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180920&DB=EPODOC&CC=US&NR=2018267909A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180920&DB=EPODOC&CC=US&NR=2018267909A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Grassi, Michael</creatorcontrib><creatorcontrib>Higgs, Raymond M</creatorcontrib><creatorcontrib>Bubb, Clinton E</creatorcontrib><creatorcontrib>Hopkins, Luke M</creatorcontrib><creatorcontrib>Pospesel, Kirk</creatorcontrib><creatorcontrib>Aden, Steven G</creatorcontrib><creatorcontrib>Haynie, Howard M</creatorcontrib><creatorcontrib>Tarr, Gabriel M</creatorcontrib><title>CONFIGURABLE HARDWARE QUEUE MANAGEMENT</title><description>A system for managing one or more queues in a multi-processor environment includes a queue manager disposed in communication with a plurality of processors and a memory shared by the plurality of processors, and a queue configured to be controlled by the queue manager, the queue including independent and discrete queue elements and having a starting location specified by a base address, the queue manager having one or more dynamically configurable parameters, the one or more dynamically configurable parameters including a size of each of the queue elements. The queue manager is configured to perform receiving a message from a processor of the plurality of processors, the message including an operation address specifying a fixed storage location in the memory and a request related to accessing the memory, selecting the queue based on the operation address, and performing a queuing operation on the queue based on the request.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBz9vdz83QPDXJ08nFV8HAMcgl3DHJVCAx1DXVV8HX0c3R39XX1C-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhZGZuaWBpaOhsbEqQIAVrMkmg</recordid><startdate>20180920</startdate><enddate>20180920</enddate><creator>Grassi, Michael</creator><creator>Higgs, Raymond M</creator><creator>Bubb, Clinton E</creator><creator>Hopkins, Luke M</creator><creator>Pospesel, Kirk</creator><creator>Aden, Steven G</creator><creator>Haynie, Howard M</creator><creator>Tarr, Gabriel M</creator><scope>EVB</scope></search><sort><creationdate>20180920</creationdate><title>CONFIGURABLE HARDWARE QUEUE MANAGEMENT</title><author>Grassi, Michael ; Higgs, Raymond M ; Bubb, Clinton E ; Hopkins, Luke M ; Pospesel, Kirk ; Aden, Steven G ; Haynie, Howard M ; Tarr, Gabriel M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018267909A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Grassi, Michael</creatorcontrib><creatorcontrib>Higgs, Raymond M</creatorcontrib><creatorcontrib>Bubb, Clinton E</creatorcontrib><creatorcontrib>Hopkins, Luke M</creatorcontrib><creatorcontrib>Pospesel, Kirk</creatorcontrib><creatorcontrib>Aden, Steven G</creatorcontrib><creatorcontrib>Haynie, Howard M</creatorcontrib><creatorcontrib>Tarr, Gabriel M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Grassi, Michael</au><au>Higgs, Raymond M</au><au>Bubb, Clinton E</au><au>Hopkins, Luke M</au><au>Pospesel, Kirk</au><au>Aden, Steven G</au><au>Haynie, Howard M</au><au>Tarr, Gabriel M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CONFIGURABLE HARDWARE QUEUE MANAGEMENT</title><date>2018-09-20</date><risdate>2018</risdate><abstract>A system for managing one or more queues in a multi-processor environment includes a queue manager disposed in communication with a plurality of processors and a memory shared by the plurality of processors, and a queue configured to be controlled by the queue manager, the queue including independent and discrete queue elements and having a starting location specified by a base address, the queue manager having one or more dynamically configurable parameters, the one or more dynamically configurable parameters including a size of each of the queue elements. The queue manager is configured to perform receiving a message from a processor of the plurality of processors, the message including an operation address specifying a fixed storage location in the memory and a request related to accessing the memory, selecting the queue based on the operation address, and performing a queuing operation on the queue based on the request.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | CONFIGURABLE HARDWARE QUEUE MANAGEMENT |
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