CURRENT IN-RUSH MITIGATION FOR POWER-UP OF EMBEDDED MEMORIES

A programmable logic circuit such as a finite state machine is provided that is configured to determine a memory array power-up sequence from a configuration signal to successively enable each memory array. A delay circuit triggers an initial memory bank in each enabled memory array to power-up with...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Singh, Harmander, Weyland, Sebastien, Venkumahanti, Suresh Kumar
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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