TIGHTLY INTEGRATED ACCELERATOR FUNCTIONS

TIGHTLY INTEGRATED ACCELERATOR FUNCTIONS

In an example, there is disclosed a computing system, including: a processor; a memory; a configuration interface to a logic configuration unit; and a system compiler including: a first block compiler to compile logic for a first logical block in a first language, the first language being a domain-s...

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Hauptverfasser: King, Robert Leroy, Keep, Andrew William, Booth, III, Earl Hardin, Marshall, John W
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator King, Robert Leroy
Keep, Andrew William
Booth, III, Earl Hardin
Marshall, John W
description In an example, there is disclosed a computing system, including: a processor; a memory; a configuration interface to a logic configuration unit; and a system compiler including: a first block compiler to compile logic for a first logical block in a first language, the first language being a domain-specific language (DSL) and the first logical block being switching logic for a network switch; a second block compiler to compile logic for a second logical block in a second language, the second language being a non-DSL and providing an external accelerator method not supported by the first language; and an interface compiler to define input/output channels for encapsulated data interchange between the first logical block and the second logical block, wherein the encapsulated data interchange is to target a resident instance of the external accelerator method.
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title TIGHTLY INTEGRATED ACCELERATOR FUNCTIONS
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