METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING

Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry i...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: AGARWAL, Rajat, MORRIS, Brian S, DAS, Debaleena
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator AGARWAL, Rajat
MORRIS, Brian S
DAS, Debaleena
description Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018196709A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018196709A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018196709A13</originalsourceid><addsrcrecordid>eNrjZDD2dQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAUgO8TT0UfB2dHZw1XBx9PPVSEYKObp587DwJqWmFOcyguluRmU3VxDnD10Uwvy41OLCxKTU_NSS-JDg40MDC0MLc3MDSwdDY2JUwUAGPQnzQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING</title><source>esp@cenet</source><creator>AGARWAL, Rajat ; MORRIS, Brian S ; DAS, Debaleena</creator><creatorcontrib>AGARWAL, Rajat ; MORRIS, Brian S ; DAS, Debaleena</creatorcontrib><description>Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180712&amp;DB=EPODOC&amp;CC=US&amp;NR=2018196709A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180712&amp;DB=EPODOC&amp;CC=US&amp;NR=2018196709A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AGARWAL, Rajat</creatorcontrib><creatorcontrib>MORRIS, Brian S</creatorcontrib><creatorcontrib>DAS, Debaleena</creatorcontrib><title>METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING</title><description>Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD2dQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAUgO8TT0UfB2dHZw1XBx9PPVSEYKObp587DwJqWmFOcyguluRmU3VxDnD10Uwvy41OLCxKTU_NSS-JDg40MDC0MLc3MDSwdDY2JUwUAGPQnzQ</recordid><startdate>20180712</startdate><enddate>20180712</enddate><creator>AGARWAL, Rajat</creator><creator>MORRIS, Brian S</creator><creator>DAS, Debaleena</creator><scope>EVB</scope></search><sort><creationdate>20180712</creationdate><title>METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING</title><author>AGARWAL, Rajat ; MORRIS, Brian S ; DAS, Debaleena</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018196709A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>AGARWAL, Rajat</creatorcontrib><creatorcontrib>MORRIS, Brian S</creatorcontrib><creatorcontrib>DAS, Debaleena</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AGARWAL, Rajat</au><au>MORRIS, Brian S</au><au>DAS, Debaleena</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING</title><date>2018-07-12</date><risdate>2018</risdate><abstract>Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2018196709A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title METHOD AND APPARATUS FOR PARTIAL CACHE LINE SPARING
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T20%3A14%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=AGARWAL,%20Rajat&rft.date=2018-07-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2018196709A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true