Methods for Forming Metal Layers in Openings and Apparatus for Forming Same

A method includes forming an Inter-layer Dielectric (ILD) having a portion at a same level as a metal gate of a transistor. The ILD and the metal gate are parts of a wafer. The ILD is etched to form a contact opening. The wafer is placed into a PVD tool, with a metal target in the PVD tool. The meta...

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Bibliographische Detailangaben

Hauptverfasser:	Liu, Hsiao-Ping, Hsu, Hung-Chang, Lu, Hung Pin, Wang, Yu-Sheng, Lin, Yuan Wen, Lin, Yu-Ting
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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