HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF
A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (BOX) of th...
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creator | Usenko, Alex |
description | A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (BOX) of the final semiconductor-on-insulator structure. The handle substrate comprising the stable carrier traps is manufactured by hydrogen ions implantation occurring using at least two different energies, followed by a 2-step thermal treatment. The thermally stable defect structures prepared thereby is stable to anneal at temperatures of at least 1180° C. The defect structure comprises 3-dimensional network of nano-cavities interconnected by dislocations. This wafer can be used as a handle wafer for fabricating silicon-on-insulator (SOI) wafers and further fabricating radio frequency (RF) semiconductor devices. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018138080A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018138080A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018138080A13</originalsourceid><addsrcrecordid>eNqNjDELwjAQRrs4iPofDpwLrS5dY3oxgfYOkru5FImTaKH-f6wouDp9fPDeWxezN9R2CElPSaIRBMcRNCEEgt6QOmNFIwI7SNgHy9SqFY4lUxkoaWeWA4urH27JQY_iuX0rv0KgM4jHiOy2xeo63ua8--6m2DsU68s8PYY8T-Ml3_Nz0HSo6qY-NlVTmfr4H_UCm546Ag</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF</title><source>esp@cenet</source><creator>Usenko, Alex</creator><creatorcontrib>Usenko, Alex</creatorcontrib><description>A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (BOX) of the final semiconductor-on-insulator structure. The handle substrate comprising the stable carrier traps is manufactured by hydrogen ions implantation occurring using at least two different energies, followed by a 2-step thermal treatment. The thermally stable defect structures prepared thereby is stable to anneal at temperatures of at least 1180° C. The defect structure comprises 3-dimensional network of nano-cavities interconnected by dislocations. This wafer can be used as a handle wafer for fabricating silicon-on-insulator (SOI) wafers and further fabricating radio frequency (RF) semiconductor devices.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180517&DB=EPODOC&CC=US&NR=2018138080A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180517&DB=EPODOC&CC=US&NR=2018138080A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Usenko, Alex</creatorcontrib><title>HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF</title><description>A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (BOX) of the final semiconductor-on-insulator structure. The handle substrate comprising the stable carrier traps is manufactured by hydrogen ions implantation occurring using at least two different energies, followed by a 2-step thermal treatment. The thermally stable defect structures prepared thereby is stable to anneal at temperatures of at least 1180° C. The defect structure comprises 3-dimensional network of nano-cavities interconnected by dislocations. This wafer can be used as a handle wafer for fabricating silicon-on-insulator (SOI) wafers and further fabricating radio frequency (RF) semiconductor devices.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDELwjAQRrs4iPofDpwLrS5dY3oxgfYOkru5FImTaKH-f6wouDp9fPDeWxezN9R2CElPSaIRBMcRNCEEgt6QOmNFIwI7SNgHy9SqFY4lUxkoaWeWA4urH27JQY_iuX0rv0KgM4jHiOy2xeo63ua8--6m2DsU68s8PYY8T-Ml3_Nz0HSo6qY-NlVTmfr4H_UCm546Ag</recordid><startdate>20180517</startdate><enddate>20180517</enddate><creator>Usenko, Alex</creator><scope>EVB</scope></search><sort><creationdate>20180517</creationdate><title>HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF</title><author>Usenko, Alex</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018138080A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Usenko, Alex</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Usenko, Alex</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF</title><date>2018-05-17</date><risdate>2018</risdate><abstract>A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (BOX) of the final semiconductor-on-insulator structure. The handle substrate comprising the stable carrier traps is manufactured by hydrogen ions implantation occurring using at least two different energies, followed by a 2-step thermal treatment. The thermally stable defect structures prepared thereby is stable to anneal at temperatures of at least 1180° C. The defect structure comprises 3-dimensional network of nano-cavities interconnected by dislocations. This wafer can be used as a handle wafer for fabricating silicon-on-insulator (SOI) wafers and further fabricating radio frequency (RF) semiconductor devices.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF |
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