VIRTUALIZING INTERRUPT PRIORITIZATION AND DELIVERY
Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction...
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creator | Neiger, Gilbert Uhlig, Richard Ghetie, Sergiu Sankaran, Rajesh Karrar, Adil Neve de Mevergnies, Michael Gerzon, Gideon |
description | Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller. |
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In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180510&DB=EPODOC&CC=US&NR=2018129619A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180510&DB=EPODOC&CC=US&NR=2018129619A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Neiger, Gilbert</creatorcontrib><creatorcontrib>Uhlig, Richard</creatorcontrib><creatorcontrib>Ghetie, Sergiu</creatorcontrib><creatorcontrib>Sankaran, Rajesh</creatorcontrib><creatorcontrib>Karrar, Adil</creatorcontrib><creatorcontrib>Neve de Mevergnies, Michael</creatorcontrib><creatorcontrib>Gerzon, Gideon</creatorcontrib><title>VIRTUALIZING INTERRUPT PRIORITIZATION AND DELIVERY</title><description>Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAK8wwKCXX08Yzy9HNX8PQLcQ0KCg0IUQgI8vQP8gzxjHIM8fT3U3D0c1FwcfXxDHMNiuRhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhaGRpZmhpaOhsbEqQIAchQojg</recordid><startdate>20180510</startdate><enddate>20180510</enddate><creator>Neiger, Gilbert</creator><creator>Uhlig, Richard</creator><creator>Ghetie, Sergiu</creator><creator>Sankaran, Rajesh</creator><creator>Karrar, Adil</creator><creator>Neve de Mevergnies, Michael</creator><creator>Gerzon, Gideon</creator><scope>EVB</scope></search><sort><creationdate>20180510</creationdate><title>VIRTUALIZING INTERRUPT PRIORITIZATION AND DELIVERY</title><author>Neiger, Gilbert ; Uhlig, Richard ; Ghetie, Sergiu ; Sankaran, Rajesh ; Karrar, Adil ; Neve de Mevergnies, Michael ; Gerzon, Gideon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018129619A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Neiger, Gilbert</creatorcontrib><creatorcontrib>Uhlig, Richard</creatorcontrib><creatorcontrib>Ghetie, Sergiu</creatorcontrib><creatorcontrib>Sankaran, Rajesh</creatorcontrib><creatorcontrib>Karrar, Adil</creatorcontrib><creatorcontrib>Neve de Mevergnies, Michael</creatorcontrib><creatorcontrib>Gerzon, Gideon</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Neiger, Gilbert</au><au>Uhlig, Richard</au><au>Ghetie, Sergiu</au><au>Sankaran, Rajesh</au><au>Karrar, Adil</au><au>Neve de Mevergnies, Michael</au><au>Gerzon, Gideon</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>VIRTUALIZING INTERRUPT PRIORITIZATION AND DELIVERY</title><date>2018-05-10</date><risdate>2018</risdate><abstract>Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | VIRTUALIZING INTERRUPT PRIORITIZATION AND DELIVERY |
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