INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS

A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Kunimatsu Atsushi, Maeda Kenichi
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Kunimatsu Atsushi
Maeda Kenichi
description A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018095663A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018095663A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018095663A13</originalsourceid><addsrcrecordid>eNqNi7EKwjAURbs4iPoPD5yF1qLoGNPXNtjkyUtScCpF4iRaqN_gd2vR7k4Xzj1nGr2UyYm1cIoMnJgkWqtMARnWSiIoIyufDaAk60YqTAYWtZJkMi8dMWjUxOfxL0U9JAIOFckjMApmYQrUaBw4-rTSM0LOiF_FzqPJtb31YfHbWbTM0clyFbpHE_quvYR7eDberuNkF-83220qkvQ_6w3lmT7I</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS</title><source>esp@cenet</source><creator>Kunimatsu Atsushi ; Maeda Kenichi</creator><creatorcontrib>Kunimatsu Atsushi ; Maeda Kenichi</creatorcontrib><description>A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180405&amp;DB=EPODOC&amp;CC=US&amp;NR=2018095663A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180405&amp;DB=EPODOC&amp;CC=US&amp;NR=2018095663A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kunimatsu Atsushi</creatorcontrib><creatorcontrib>Maeda Kenichi</creatorcontrib><title>INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS</title><description>A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAURbs4iPoPD5yF1qLoGNPXNtjkyUtScCpF4iRaqN_gd2vR7k4Xzj1nGr2UyYm1cIoMnJgkWqtMARnWSiIoIyufDaAk60YqTAYWtZJkMi8dMWjUxOfxL0U9JAIOFckjMApmYQrUaBw4-rTSM0LOiF_FzqPJtb31YfHbWbTM0clyFbpHE_quvYR7eDberuNkF-83220qkvQ_6w3lmT7I</recordid><startdate>20180405</startdate><enddate>20180405</enddate><creator>Kunimatsu Atsushi</creator><creator>Maeda Kenichi</creator><scope>EVB</scope></search><sort><creationdate>20180405</creationdate><title>INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS</title><author>Kunimatsu Atsushi ; Maeda Kenichi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018095663A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Kunimatsu Atsushi</creatorcontrib><creatorcontrib>Maeda Kenichi</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kunimatsu Atsushi</au><au>Maeda Kenichi</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS</title><date>2018-04-05</date><risdate>2018</risdate><abstract>A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2018095663A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title INFORMATION PROCESSING DEVICE INCLUDING HOST DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING A BLOCK REARRANGEMENT TO SECURE FREE BLOCKS
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T23%3A42%3A18IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kunimatsu%20Atsushi&rft.date=2018-04-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2018095663A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true