VIDEO PROCESSING DEVICE
Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enabl...
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creator | FUKUDA Yasuhiro SHIMANO Yoshihiro |
description | Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enable signal such that a display invalid section having a predetermined number of fields is set for an interlace video signal at a predetermined period based on a vertical synchronization signal included in the interlace video signal input from outside. The video signal processor generates the display video signal by setting the display invalid section for the interlace video signal based on the data enable signal and outputs the display video signal to the liquid crystal display. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018063385A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018063385A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018063385A13</originalsourceid><addsrcrecordid>eNrjZBAP83Rx9VcICPJ3dg0O9vRzV3BxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhYGZsbGFqaOhsbEqQIAUT4gXg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>VIDEO PROCESSING DEVICE</title><source>esp@cenet</source><creator>FUKUDA Yasuhiro ; SHIMANO Yoshihiro</creator><creatorcontrib>FUKUDA Yasuhiro ; SHIMANO Yoshihiro</creatorcontrib><description>Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enable signal such that a display invalid section having a predetermined number of fields is set for an interlace video signal at a predetermined period based on a vertical synchronization signal included in the interlace video signal input from outside. The video signal processor generates the display video signal by setting the display invalid section for the interlace video signal based on the data enable signal and outputs the display video signal to the liquid crystal display.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180301&DB=EPODOC&CC=US&NR=2018063385A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180301&DB=EPODOC&CC=US&NR=2018063385A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FUKUDA Yasuhiro</creatorcontrib><creatorcontrib>SHIMANO Yoshihiro</creatorcontrib><title>VIDEO PROCESSING DEVICE</title><description>Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enable signal such that a display invalid section having a predetermined number of fields is set for an interlace video signal at a predetermined period based on a vertical synchronization signal included in the interlace video signal input from outside. The video signal processor generates the display video signal by setting the display invalid section for the interlace video signal based on the data enable signal and outputs the display video signal to the liquid crystal display.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAP83Rx9VcICPJ3dg0O9vRzV3BxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhhYGZsbGFqaOhsbEqQIAUT4gXg</recordid><startdate>20180301</startdate><enddate>20180301</enddate><creator>FUKUDA Yasuhiro</creator><creator>SHIMANO Yoshihiro</creator><scope>EVB</scope></search><sort><creationdate>20180301</creationdate><title>VIDEO PROCESSING DEVICE</title><author>FUKUDA Yasuhiro ; SHIMANO Yoshihiro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018063385A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><toplevel>online_resources</toplevel><creatorcontrib>FUKUDA Yasuhiro</creatorcontrib><creatorcontrib>SHIMANO Yoshihiro</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FUKUDA Yasuhiro</au><au>SHIMANO Yoshihiro</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>VIDEO PROCESSING DEVICE</title><date>2018-03-01</date><risdate>2018</risdate><abstract>Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enable signal such that a display invalid section having a predetermined number of fields is set for an interlace video signal at a predetermined period based on a vertical synchronization signal included in the interlace video signal input from outside. The video signal processor generates the display video signal by setting the display invalid section for the interlace video signal based on the data enable signal and outputs the display video signal to the liquid crystal display.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PICTORIAL COMMUNICATION, e.g. TELEVISION |
title | VIDEO PROCESSING DEVICE |
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