METHOD FOR CPU/HEATSINK ANTI-TIP AND SOCKET DAMAGE PREVENTION

METHOD FOR CPU/HEATSINK ANTI-TIP AND SOCKET DAMAGE PREVENTION

An information handling system (IHS) includes a heatsink retention apparatus. A processor mounted on a board receives a heatsink base having peripheral, spaced apertures. At least two latching mechanisms include a mounting portion received respectively in peripheral, spaced apertures on opposites si...

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Hauptverfasser: KYLE LAWRENCE A, HARTMAN COREY D
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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creator KYLE LAWRENCE A
HARTMAN COREY D
description An information handling system (IHS) includes a heatsink retention apparatus. A processor mounted on a board receives a heatsink base having peripheral, spaced apertures. At least two latching mechanisms include a mounting portion received respectively in peripheral, spaced apertures on opposites sides of the heatsink base. A latching surface is mounted to one of (i) the heatsink base and (ii) a terminal portion of the mounting portion to engage respectively with either the mounting portion or an upper edge of the corresponding peripheral, spaced aperture of the heatsink base. At least two peripheral, spaced loading screws are sized to be engageable by loading nuts when the heatsink base is positioned not higher than the engagement height. The engaged, at least two, latching mechanisms prevent tipping of the heatsink base during loading of the at least two peripheral, spaced loading screws with the at least two spaced apart loading nuts.
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subjects BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
title METHOD FOR CPU/HEATSINK ANTI-TIP AND SOCKET DAMAGE PREVENTION
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