SWITCHED CAPACITOR BIASING CIRCUIT

Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises a...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
1. Verfasser:	Ates Erdogan Ozgur
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CONTROLLING ELECTRICITY PHYSICS PULSE TECHNIQUE REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	Ates Erdogan Ozgur
description	Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises additional source follower transistors (M5, M6) associated with the first and second input differential transistors (M1, M2).The bias generator circuit has a PMOS switched capacitor reference circuit (11) and a NMOS switched capacitor reference circuit (10) and a transconductor reference cell (15). The transconductor reference cell (15) is a replica of a basic reference cell used in a further circuit.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2017308106A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2017308106A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2017308106A13</originalsourceid><addsrcrecordid>eNrjZFAKDvcMcfZwdVFwdgxwdPYM8Q9ScPJ0DPb0c1dw9gxyDvUM4WFgTUvMKU7lhdLcDMpurkA9uqkF-fGpxQWJyal5qSXxocFGBobmxgYWhgZmjobGxKkCAMBYI1Y</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SWITCHED CAPACITOR BIASING CIRCUIT</title><source>esp@cenet</source><creator>Ates Erdogan Ozgur</creator><creatorcontrib>Ates Erdogan Ozgur</creatorcontrib><description>Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises additional source follower transistors (M5, M6) associated with the first and second input differential transistors (M1, M2).The bias generator circuit has a PMOS switched capacitor reference circuit (11) and a NMOS switched capacitor reference circuit (10) and a transconductor reference cell (15). The transconductor reference cell (15) is a replica of a basic reference cell used in a further circuit.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CONTROLLING ; ELECTRICITY ; PHYSICS ; PULSE TECHNIQUE ; REGULATING ; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171026&DB=EPODOC&CC=US&NR=2017308106A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171026&DB=EPODOC&CC=US&NR=2017308106A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ates Erdogan Ozgur</creatorcontrib><title>SWITCHED CAPACITOR BIASING CIRCUIT</title><description>Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises additional source follower transistors (M5, M6) associated with the first and second input differential transistors (M1, M2).The bias generator circuit has a PMOS switched capacitor reference circuit (11) and a NMOS switched capacitor reference circuit (10) and a transconductor reference cell (15). The transconductor reference cell (15) is a replica of a basic reference cell used in a further circuit.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROLLING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>REGULATING</subject><subject>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAKDvcMcfZwdVFwdgxwdPYM8Q9ScPJ0DPb0c1dw9gxyDvUM4WFgTUvMKU7lhdLcDMpurkA9uqkF-fGpxQWJyal5qSXxocFGBobmxgYWhgZmjobGxKkCAMBYI1Y</recordid><startdate>20171026</startdate><enddate>20171026</enddate><creator>Ates Erdogan Ozgur</creator><scope>EVB</scope></search><sort><creationdate>20171026</creationdate><title>SWITCHED CAPACITOR BIASING CIRCUIT</title><author>Ates Erdogan Ozgur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2017308106A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROLLING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>REGULATING</topic><topic>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</topic><toplevel>online_resources</toplevel><creatorcontrib>Ates Erdogan Ozgur</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ates Erdogan Ozgur</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SWITCHED CAPACITOR BIASING CIRCUIT</title><date>2017-10-26</date><risdate>2017</risdate><abstract>Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises additional source follower transistors (M5, M6) associated with the first and second input differential transistors (M1, M2).The bias generator circuit has a PMOS switched capacitor reference circuit (11) and a NMOS switched capacitor reference circuit (10) and a transconductor reference cell (15). The transconductor reference cell (15) is a replica of a basic reference cell used in a further circuit.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US2017308106A1
source	esp@cenet
subjects	BASIC ELECTRONIC CIRCUITRY CONTROLLING ELECTRICITY PHYSICS PULSE TECHNIQUE REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
title	SWITCHED CAPACITOR BIASING CIRCUIT
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T01%3A55%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Ates%20Erdogan%20Ozgur&rft.date=2017-10-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2017308106A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true