WRITE ASSIST CIRCUIT FOR LOWERING A MEMEORY SUPPLY VOLTAGE AND COUPLING A MEMORY BIT LINE

A circuit and method performs a write assist for a memory cell (e.g., a static random access memory cell (SRAM)). The method includes providing a lower supply voltage signal to a voltage supply node of the memory cell using a capacitor. The lower supply voltage signal is lower in voltage level than...

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Hauptverfasser:	Winter Mark J, Zhang Yifei
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
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creator	Winter Mark J Zhang Yifei
description	A circuit and method performs a write assist for a memory cell (e.g., a static random access memory cell (SRAM)). The method includes providing a lower supply voltage signal to a voltage supply node of the memory cell using a capacitor. The lower supply voltage signal is lower in voltage level than a supply voltage signal. The method further includes lowering a common signal provided to a write driver using the capacitor.
format	Patent
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subjects	INFORMATION STORAGE PHYSICS STATIC STORES
title	WRITE ASSIST CIRCUIT FOR LOWERING A MEMEORY SUPPLY VOLTAGE AND COUPLING A MEMORY BIT LINE
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