LOW COST HERMETIC MICRO-ELECTRONICS
A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurali...
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creator | Nah Jae-Woong Polastre Robert John Knickerbocker John U Dang Bing Lu Minhua |
description | A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2017194225A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2017194225A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2017194225A13</originalsourceid><addsrcrecordid>eNrjZFD28Q9XcPYPDlHwcA3ydQ3xdFbw9XQO8td19XF1Dgny9_N0DuZhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhuaGliZGRqaOhsbEqQIA7Hwjvg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>LOW COST HERMETIC MICRO-ELECTRONICS</title><source>esp@cenet</source><creator>Nah Jae-Woong ; Polastre Robert John ; Knickerbocker John U ; Dang Bing ; Lu Minhua</creator><creatorcontrib>Nah Jae-Woong ; Polastre Robert John ; Knickerbocker John U ; Dang Bing ; Lu Minhua</creatorcontrib><description>A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170706&DB=EPODOC&CC=US&NR=2017194225A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170706&DB=EPODOC&CC=US&NR=2017194225A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Nah Jae-Woong</creatorcontrib><creatorcontrib>Polastre Robert John</creatorcontrib><creatorcontrib>Knickerbocker John U</creatorcontrib><creatorcontrib>Dang Bing</creatorcontrib><creatorcontrib>Lu Minhua</creatorcontrib><title>LOW COST HERMETIC MICRO-ELECTRONICS</title><description>A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD28Q9XcPYPDlHwcA3ydQ3xdFbw9XQO8td19XF1Dgny9_N0DuZhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhuaGliZGRqaOhsbEqQIA7Hwjvg</recordid><startdate>20170706</startdate><enddate>20170706</enddate><creator>Nah Jae-Woong</creator><creator>Polastre Robert John</creator><creator>Knickerbocker John U</creator><creator>Dang Bing</creator><creator>Lu Minhua</creator><scope>EVB</scope></search><sort><creationdate>20170706</creationdate><title>LOW COST HERMETIC MICRO-ELECTRONICS</title><author>Nah Jae-Woong ; Polastre Robert John ; Knickerbocker John U ; Dang Bing ; Lu Minhua</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2017194225A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Nah Jae-Woong</creatorcontrib><creatorcontrib>Polastre Robert John</creatorcontrib><creatorcontrib>Knickerbocker John U</creatorcontrib><creatorcontrib>Dang Bing</creatorcontrib><creatorcontrib>Lu Minhua</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nah Jae-Woong</au><au>Polastre Robert John</au><au>Knickerbocker John U</au><au>Dang Bing</au><au>Lu Minhua</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LOW COST HERMETIC MICRO-ELECTRONICS</title><date>2017-07-06</date><risdate>2017</risdate><abstract>A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | LOW COST HERMETIC MICRO-ELECTRONICS |
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