DIFFERENTIAL SUMMING NODE
A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled...
Gespeichert in:
| Hauptverfasser: | , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Brekelmans Johannes Bolatkale Muhammed Breems Lucien Bajoria Shagun Niehof Jan Rutten Robert |
| description | A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled to a first and second output. The summing node further comprises a second differential transistor pair comprising a third and fourth input and coupled to the first and second output. The first and fourth inputs are respectively coupled to the direct and inverse signal components of the first differential signal and the second and third inputs are respectively coupled to the direct and inverse signal components of the second differential signal. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2017149388A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2017149388A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2017149388A13</originalsourceid><addsrcrecordid>eNrjZJB08XRzcw1y9QvxdPRRCA719fX0c1fw83dx5WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaG5oYmlsYWFo6GxsSpAgCU2CD9</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DIFFERENTIAL SUMMING NODE</title><source>esp@cenet</source><creator>Brekelmans Johannes ; Bolatkale Muhammed ; Breems Lucien ; Bajoria Shagun ; Niehof Jan ; Rutten Robert</creator><creatorcontrib>Brekelmans Johannes ; Bolatkale Muhammed ; Breems Lucien ; Bajoria Shagun ; Niehof Jan ; Rutten Robert</creatorcontrib><description>A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled to a first and second output. The summing node further comprises a second differential transistor pair comprising a third and fourth input and coupled to the first and second output. The first and fourth inputs are respectively coupled to the direct and inverse signal components of the first differential signal and the second and third inputs are respectively coupled to the direct and inverse signal components of the second differential signal.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ; ELECTRICITY</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170525&DB=EPODOC&CC=US&NR=2017149388A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170525&DB=EPODOC&CC=US&NR=2017149388A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Brekelmans Johannes</creatorcontrib><creatorcontrib>Bolatkale Muhammed</creatorcontrib><creatorcontrib>Breems Lucien</creatorcontrib><creatorcontrib>Bajoria Shagun</creatorcontrib><creatorcontrib>Niehof Jan</creatorcontrib><creatorcontrib>Rutten Robert</creatorcontrib><title>DIFFERENTIAL SUMMING NODE</title><description>A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled to a first and second output. The summing node further comprises a second differential transistor pair comprising a third and fourth input and coupled to the first and second output. The first and fourth inputs are respectively coupled to the direct and inverse signal components of the first differential signal and the second and third inputs are respectively coupled to the direct and inverse signal components of the second differential signal.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJB08XRzcw1y9QvxdPRRCA719fX0c1fw83dx5WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaG5oYmlsYWFo6GxsSpAgCU2CD9</recordid><startdate>20170525</startdate><enddate>20170525</enddate><creator>Brekelmans Johannes</creator><creator>Bolatkale Muhammed</creator><creator>Breems Lucien</creator><creator>Bajoria Shagun</creator><creator>Niehof Jan</creator><creator>Rutten Robert</creator><scope>EVB</scope></search><sort><creationdate>20170525</creationdate><title>DIFFERENTIAL SUMMING NODE</title><author>Brekelmans Johannes ; Bolatkale Muhammed ; Breems Lucien ; Bajoria Shagun ; Niehof Jan ; Rutten Robert</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2017149388A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Brekelmans Johannes</creatorcontrib><creatorcontrib>Bolatkale Muhammed</creatorcontrib><creatorcontrib>Breems Lucien</creatorcontrib><creatorcontrib>Bajoria Shagun</creatorcontrib><creatorcontrib>Niehof Jan</creatorcontrib><creatorcontrib>Rutten Robert</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Brekelmans Johannes</au><au>Bolatkale Muhammed</au><au>Breems Lucien</au><au>Bajoria Shagun</au><au>Niehof Jan</au><au>Rutten Robert</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DIFFERENTIAL SUMMING NODE</title><date>2017-05-25</date><risdate>2017</risdate><abstract>A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled to a first and second output. The summing node further comprises a second differential transistor pair comprising a third and fourth input and coupled to the first and second output. The first and fourth inputs are respectively coupled to the direct and inverse signal components of the first differential signal and the second and third inputs are respectively coupled to the direct and inverse signal components of the second differential signal.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2017149388A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ELECTRICITY |
| title | DIFFERENTIAL SUMMING NODE |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T19%3A54%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Brekelmans%20Johannes&rft.date=2017-05-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2017149388A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |