DISPLAY APPARATUS
A display apparatus includes a printed circuit board (PCB). A power management integrated circuit (PMIC) is mounted on the PCB and is configured to generate first to fourth gate clock signals and first to fourth inversion gate clock signals. A phase of the first gate clock signal partially overlaps...
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| creator | LEE HYOUL HONG HYUN-SEOK |
| description | A display apparatus includes a printed circuit board (PCB). A power management integrated circuit (PMIC) is mounted on the PCB and is configured to generate first to fourth gate clock signals and first to fourth inversion gate clock signals. A phase of the first gate clock signal partially overlaps a phase of the second to fourth gate clock signal. Each of the first to fourth inversion gate clock signals has a phase opposite to that of a respective one of the first to fourth gate clock signals. A gate driver generates a plurality of gate signals based on the first to fourth gate clock signals and the first to fourth inversion gate clock signals and applies the plurality of gate signals to a plurality of gate lines. A display panel is connected to the plurality of gate lines. |
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A phase of the first gate clock signal partially overlaps a phase of the second to fourth gate clock signal. Each of the first to fourth inversion gate clock signals has a phase opposite to that of a respective one of the first to fourth gate clock signals. A gate driver generates a plurality of gate signals based on the first to fourth gate clock signals and the first to fourth inversion gate clock signals and applies the plurality of gate signals to a plurality of gate lines. A display panel is connected to the plurality of gate lines.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PHYSICS ; PRINTED CIRCUITS ; SEALS</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170223&DB=EPODOC&CC=US&NR=2017053617A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170223&DB=EPODOC&CC=US&NR=2017053617A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE HYOUL</creatorcontrib><creatorcontrib>HONG HYUN-SEOK</creatorcontrib><title>DISPLAY APPARATUS</title><description>A display apparatus includes a printed circuit board (PCB). A power management integrated circuit (PMIC) is mounted on the PCB and is configured to generate first to fourth gate clock signals and first to fourth inversion gate clock signals. A phase of the first gate clock signal partially overlaps a phase of the second to fourth gate clock signal. Each of the first to fourth inversion gate clock signals has a phase opposite to that of a respective one of the first to fourth gate clock signals. A gate driver generates a plurality of gate signals based on the first to fourth gate clock signals and the first to fourth inversion gate clock signals and applies the plurality of gate signals to a plurality of gate lines. A display panel is connected to the plurality of gate lines.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB08QwO8HGMVHAMCHAMcgwJDeZhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhuYGpsZmhuaOhsbEqQIAohge0w</recordid><startdate>20170223</startdate><enddate>20170223</enddate><creator>LEE HYOUL</creator><creator>HONG HYUN-SEOK</creator><scope>EVB</scope></search><sort><creationdate>20170223</creationdate><title>DISPLAY APPARATUS</title><author>LEE HYOUL ; HONG HYUN-SEOK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2017053617A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE HYOUL</creatorcontrib><creatorcontrib>HONG HYUN-SEOK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE HYOUL</au><au>HONG HYUN-SEOK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DISPLAY APPARATUS</title><date>2017-02-23</date><risdate>2017</risdate><abstract>A display apparatus includes a printed circuit board (PCB). A power management integrated circuit (PMIC) is mounted on the PCB and is configured to generate first to fourth gate clock signals and first to fourth inversion gate clock signals. A phase of the first gate clock signal partially overlaps a phase of the second to fourth gate clock signal. Each of the first to fourth inversion gate clock signals has a phase opposite to that of a respective one of the first to fourth gate clock signals. A gate driver generates a plurality of gate signals based on the first to fourth gate clock signals and the first to fourth inversion gate clock signals and applies the plurality of gate signals to a plurality of gate lines. A display panel is connected to the plurality of gate lines.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
| recordid | cdi_epo_espacenet_US2017053617A1 |
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| subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PHYSICS PRINTED CIRCUITS SEALS |
| title | DISPLAY APPARATUS |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T21%3A27%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LEE%20HYOUL&rft.date=2017-02-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2017053617A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |