NOISE MITIGATION FOR WRITE PRECOMPENSATION TUNING

The disclosed technology provides techniques for mitigating write-to-write bit error rate fluctuations that decrease accuracy of write precompensation (WPC) tuning According to one implementation, such write-to-write bit error rate fluctuations are mitigated if a predetermined pattern is written at a particular radial offset from a target data track prior to testing a WPC register in association with the target data track. Selection of the particular radial offset can be performed according to an iterative offset track clean-up disclosed herein.