Computer Processor Providing Exception Handling with Reduced State Storage

A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation ma...

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Bibliographische Detailangaben

Hauptverfasser:	DE KRUIJF MARC ASHER, SANKARALINGAM KARTHIKEYAN, MENON JAIKRISHNAN
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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