Computer Processor Providing Exception Handling with Reduced State Storage

A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation ma...

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Hauptverfasser: DE KRUIJF MARC ASHER, SANKARALINGAM KARTHIKEYAN, MENON JAIKRISHNAN
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creator DE KRUIJF MARC ASHER
SANKARALINGAM KARTHIKEYAN
MENON JAIKRISHNAN
description A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation may be provided by a similar mechanism but using smaller idempotent regions reflecting a more frequent occurrence of mis-speculation. A compiler generating different idempotent regions for speculation and exception handling is also disclosed.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Computer Processor Providing Exception Handling with Reduced State Storage
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