Method for Manufacturing a Semiconductor Device, and Semiconductor Device
A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by respecti...
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creator | POELZL MARTIN |
description | A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by respective dielectric layers. A respective pillar on each of the neighboring semiconductor mesas is formed, leaving an opening between the pillars above the trench. Dielectric contact spacers are formed in the opening along respective pillar side walls to narrow the opening above the gate electrode. A conductor is formed, having an interface with the gate electrode. The interface extends along an extension of the gate electrode, and the conductor has a conductivity greater than the conductivity of the gate electrode. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016141380A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016141380A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016141380A13</originalsourceid><addsrcrecordid>eNrjZPD0TS3JyE9RSMsvUvBNzCtNS0wuKS3KzEtXSFQITs3NTM7PSylNLgHKuqSWZSan6igk5qVgleFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhmaGJobGFgaOhsbEqQIAg5A1Mg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for Manufacturing a Semiconductor Device, and Semiconductor Device</title><source>esp@cenet</source><creator>POELZL MARTIN</creator><creatorcontrib>POELZL MARTIN</creatorcontrib><description>A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by respective dielectric layers. A respective pillar on each of the neighboring semiconductor mesas is formed, leaving an opening between the pillars above the trench. Dielectric contact spacers are formed in the opening along respective pillar side walls to narrow the opening above the gate electrode. A conductor is formed, having an interface with the gate electrode. The interface extends along an extension of the gate electrode, and the conductor has a conductivity greater than the conductivity of the gate electrode.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160519&DB=EPODOC&CC=US&NR=2016141380A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160519&DB=EPODOC&CC=US&NR=2016141380A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>POELZL MARTIN</creatorcontrib><title>Method for Manufacturing a Semiconductor Device, and Semiconductor Device</title><description>A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by respective dielectric layers. A respective pillar on each of the neighboring semiconductor mesas is formed, leaving an opening between the pillars above the trench. Dielectric contact spacers are formed in the opening along respective pillar side walls to narrow the opening above the gate electrode. A conductor is formed, having an interface with the gate electrode. The interface extends along an extension of the gate electrode, and the conductor has a conductivity greater than the conductivity of the gate electrode.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPD0TS3JyE9RSMsvUvBNzCtNS0wuKS3KzEtXSFQITs3NTM7PSylNLgHKuqSWZSan6igk5qVgleFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhmaGJobGFgaOhsbEqQIAg5A1Mg</recordid><startdate>20160519</startdate><enddate>20160519</enddate><creator>POELZL MARTIN</creator><scope>EVB</scope></search><sort><creationdate>20160519</creationdate><title>Method for Manufacturing a Semiconductor Device, and Semiconductor Device</title><author>POELZL MARTIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016141380A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>POELZL MARTIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>POELZL MARTIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for Manufacturing a Semiconductor Device, and Semiconductor Device</title><date>2016-05-19</date><risdate>2016</risdate><abstract>A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by respective dielectric layers. A respective pillar on each of the neighboring semiconductor mesas is formed, leaving an opening between the pillars above the trench. Dielectric contact spacers are formed in the opening along respective pillar side walls to narrow the opening above the gate electrode. A conductor is formed, having an interface with the gate electrode. The interface extends along an extension of the gate electrode, and the conductor has a conductivity greater than the conductivity of the gate electrode.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Method for Manufacturing a Semiconductor Device, and Semiconductor Device |
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