MOLD PACKAGE AND MANUFACTURING METHOD THEREOF
A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wir...
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creator | OKA KENGO UCHIBORI SHINYA TAKENAKA MASAYUKI SANADA YUKI FUKUDA TASUKE |
description | A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wiring part and intersects with the wiring part. The resin film is disposed between the first surface of the substrate and the end of the molding resin, and seals the wiring part and the first surface of the substrate adjacent to the wiring part. The resin film includes a first portion disposed inside the molding resin and a second portion disposed outside the molding resin. An upper surface of the second portion is lower than an upper surface of the first portion and has less uneven portions than the upper surface of the first portion. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016133539A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016133539A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016133539A13</originalsourceid><addsrcrecordid>eNrjZND19fdxUQhwdPZ2dHdVcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3UQjxcA1y9XfjYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoZmhsbGpsaWjobGxKkCADpYJjc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MOLD PACKAGE AND MANUFACTURING METHOD THEREOF</title><source>esp@cenet</source><creator>OKA KENGO ; UCHIBORI SHINYA ; TAKENAKA MASAYUKI ; SANADA YUKI ; FUKUDA TASUKE</creator><creatorcontrib>OKA KENGO ; UCHIBORI SHINYA ; TAKENAKA MASAYUKI ; SANADA YUKI ; FUKUDA TASUKE</creatorcontrib><description>A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wiring part and intersects with the wiring part. The resin film is disposed between the first surface of the substrate and the end of the molding resin, and seals the wiring part and the first surface of the substrate adjacent to the wiring part. The resin film includes a first portion disposed inside the molding resin and a second portion disposed outside the molding resin. An upper surface of the second portion is lower than an upper surface of the first portion and has less uneven portions than the upper surface of the first portion.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160512&DB=EPODOC&CC=US&NR=2016133539A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160512&DB=EPODOC&CC=US&NR=2016133539A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OKA KENGO</creatorcontrib><creatorcontrib>UCHIBORI SHINYA</creatorcontrib><creatorcontrib>TAKENAKA MASAYUKI</creatorcontrib><creatorcontrib>SANADA YUKI</creatorcontrib><creatorcontrib>FUKUDA TASUKE</creatorcontrib><title>MOLD PACKAGE AND MANUFACTURING METHOD THEREOF</title><description>A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wiring part and intersects with the wiring part. The resin film is disposed between the first surface of the substrate and the end of the molding resin, and seals the wiring part and the first surface of the substrate adjacent to the wiring part. The resin film includes a first portion disposed inside the molding resin and a second portion disposed outside the molding resin. An upper surface of the second portion is lower than an upper surface of the first portion and has less uneven portions than the upper surface of the first portion.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND19fdxUQhwdPZ2dHdVcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3UQjxcA1y9XfjYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoZmhsbGpsaWjobGxKkCADpYJjc</recordid><startdate>20160512</startdate><enddate>20160512</enddate><creator>OKA KENGO</creator><creator>UCHIBORI SHINYA</creator><creator>TAKENAKA MASAYUKI</creator><creator>SANADA YUKI</creator><creator>FUKUDA TASUKE</creator><scope>EVB</scope></search><sort><creationdate>20160512</creationdate><title>MOLD PACKAGE AND MANUFACTURING METHOD THEREOF</title><author>OKA KENGO ; UCHIBORI SHINYA ; TAKENAKA MASAYUKI ; SANADA YUKI ; FUKUDA TASUKE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016133539A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OKA KENGO</creatorcontrib><creatorcontrib>UCHIBORI SHINYA</creatorcontrib><creatorcontrib>TAKENAKA MASAYUKI</creatorcontrib><creatorcontrib>SANADA YUKI</creatorcontrib><creatorcontrib>FUKUDA TASUKE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OKA KENGO</au><au>UCHIBORI SHINYA</au><au>TAKENAKA MASAYUKI</au><au>SANADA YUKI</au><au>FUKUDA TASUKE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MOLD PACKAGE AND MANUFACTURING METHOD THEREOF</title><date>2016-05-12</date><risdate>2016</risdate><abstract>A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wiring part and intersects with the wiring part. The resin film is disposed between the first surface of the substrate and the end of the molding resin, and seals the wiring part and the first surface of the substrate adjacent to the wiring part. The resin film includes a first portion disposed inside the molding resin and a second portion disposed outside the molding resin. An upper surface of the second portion is lower than an upper surface of the first portion and has less uneven portions than the upper surface of the first portion.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | MOLD PACKAGE AND MANUFACTURING METHOD THEREOF |
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