MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD

A serial peripheral interface is configurable to operate in a I2S transmission mode. The interface has a transmission unit connected with external pins for data, bit clock, and left/right clock signal, a first-in-first-out (FIFO) buffer with a plurality of memory lines, and a control unit operable t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: PESAVENTO RODNEY, CASADY JAMES, PAVLOV SERGEY
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator PESAVENTO RODNEY
CASADY JAMES
PAVLOV SERGEY
description A serial peripheral interface is configurable to operate in a I2S transmission mode. The interface has a transmission unit connected with external pins for data, bit clock, and left/right clock signal, a first-in-first-out (FIFO) buffer with a plurality of memory lines, and a control unit operable to read data portions from two memory lines, to assemble them into a transmission word, and to forward the assembled transmission word to the transmission unit, wherein the transmission unit is configured to serially transmit the assembled transmission word through the external data pin.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016132440A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016132440A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016132440A13</originalsourceid><addsrcrecordid>eNrjZDDxDfUJ8dR19nD083P1UfA0ClYICXL0C_b1DFFw9vcLCfL3UQiODA5x9VVw9HNR8HUN8fB34WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGZobGRiYmBo6GxsSpAgBoKChI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD</title><source>esp@cenet</source><creator>PESAVENTO RODNEY ; CASADY JAMES ; PAVLOV SERGEY</creator><creatorcontrib>PESAVENTO RODNEY ; CASADY JAMES ; PAVLOV SERGEY</creatorcontrib><description>A serial peripheral interface is configurable to operate in a I2S transmission mode. The interface has a transmission unit connected with external pins for data, bit clock, and left/right clock signal, a first-in-first-out (FIFO) buffer with a plurality of memory lines, and a control unit operable to read data portions from two memory lines, to assemble them into a transmission word, and to forward the assembled transmission word to the transmission unit, wherein the transmission unit is configured to serially transmit the assembled transmission word through the external data pin.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20160512&amp;DB=EPODOC&amp;CC=US&amp;NR=2016132440A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20160512&amp;DB=EPODOC&amp;CC=US&amp;NR=2016132440A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PESAVENTO RODNEY</creatorcontrib><creatorcontrib>CASADY JAMES</creatorcontrib><creatorcontrib>PAVLOV SERGEY</creatorcontrib><title>MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD</title><description>A serial peripheral interface is configurable to operate in a I2S transmission mode. The interface has a transmission unit connected with external pins for data, bit clock, and left/right clock signal, a first-in-first-out (FIFO) buffer with a plurality of memory lines, and a control unit operable to read data portions from two memory lines, to assemble them into a transmission word, and to forward the assembled transmission word to the transmission unit, wherein the transmission unit is configured to serially transmit the assembled transmission word through the external data pin.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDxDfUJ8dR19nD083P1UfA0ClYICXL0C_b1DFFw9vcLCfL3UQiODA5x9VVw9HNR8HUN8fB34WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGZobGRiYmBo6GxsSpAgBoKChI</recordid><startdate>20160512</startdate><enddate>20160512</enddate><creator>PESAVENTO RODNEY</creator><creator>CASADY JAMES</creator><creator>PAVLOV SERGEY</creator><scope>EVB</scope></search><sort><creationdate>20160512</creationdate><title>MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD</title><author>PESAVENTO RODNEY ; CASADY JAMES ; PAVLOV SERGEY</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016132440A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>PESAVENTO RODNEY</creatorcontrib><creatorcontrib>CASADY JAMES</creatorcontrib><creatorcontrib>PAVLOV SERGEY</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PESAVENTO RODNEY</au><au>CASADY JAMES</au><au>PAVLOV SERGEY</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD</title><date>2016-05-12</date><risdate>2016</risdate><abstract>A serial peripheral interface is configurable to operate in a I2S transmission mode. The interface has a transmission unit connected with external pins for data, bit clock, and left/right clock signal, a first-in-first-out (FIFO) buffer with a plurality of memory lines, and a control unit operable to read data portions from two memory lines, to assemble them into a transmission word, and to forward the assembled transmission word to the transmission unit, wherein the transmission unit is configured to serially transmit the assembled transmission word through the external data pin.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2016132440A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title MULTI-CHANNEL I2S TRANSMIT CONTROL SYSTEM AND METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T13%3A52%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=PESAVENTO%20RODNEY&rft.date=2016-05-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2016132440A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true