COMPILE METHOD AND COMPILER APPARATUS
A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space fo...
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creator | UENO MASAKAZU DOTEGUCHI MASAHIRO |
description | A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction. |
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The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. 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The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB19vcN8PRxVfB1DfHwd1Fw9HNRgAoFKTgGBDgGOYaEBvMwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQzNDA2MzC2NHQ2PiVAEAJNgkJQ</recordid><startdate>20160414</startdate><enddate>20160414</enddate><creator>UENO MASAKAZU</creator><creator>DOTEGUCHI MASAHIRO</creator><scope>EVB</scope></search><sort><creationdate>20160414</creationdate><title>COMPILE METHOD AND COMPILER APPARATUS</title><author>UENO MASAKAZU ; DOTEGUCHI MASAHIRO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016103683A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>UENO MASAKAZU</creatorcontrib><creatorcontrib>DOTEGUCHI MASAHIRO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>UENO MASAKAZU</au><au>DOTEGUCHI MASAHIRO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>COMPILE METHOD AND COMPILER APPARATUS</title><date>2016-04-14</date><risdate>2016</risdate><abstract>A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | COMPILE METHOD AND COMPILER APPARATUS |
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