TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION
Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v)...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | LIRAN TUVIA |
| description | Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v) a floating line connecting (i) a source of the third p-type FET, and (ii) a source of the fourth p-type FET, wherein: (a) the first data line is connected to: a gate of the second p-type FET, a gate of the second n-type FET, a drain of the third p-type FET, and a gate of the fourth p-type FET, and (b) the second data line is connected to: a gate of the first p-type FET, a gate of the first n-type FET, a drain of the fourth p-type FET, and a gate of the third p-type FET. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016099046A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016099046A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016099046A13</originalsourceid><addsrcrecordid>eNrjZHAPcXX28PMMDHUNVnDzD1JwcQxxVAhyDXH1C_H091Pw9FPwdfX1D4pUcHb18QlWcAkN8vRzVwjwD3cNAkqGuAYFhQaAVPIwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQzMDS0sDEzNHQ2PiVAEAsvUt6g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION</title><source>esp@cenet</source><creator>LIRAN TUVIA</creator><creatorcontrib>LIRAN TUVIA</creatorcontrib><description>Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v) a floating line connecting (i) a source of the third p-type FET, and (ii) a source of the fourth p-type FET, wherein: (a) the first data line is connected to: a gate of the second p-type FET, a gate of the second n-type FET, a drain of the third p-type FET, and a gate of the fourth p-type FET, and (b) the second data line is connected to: a gate of the first p-type FET, a gate of the first n-type FET, a drain of the fourth p-type FET, and a gate of the third p-type FET.</description><language>eng</language><subject>BANDAGES, DRESSINGS OR ABSORBENT PADS ; DEVICES PROVIDING PATENCY TO, OR PREVENTING COLLAPSING OF,TUBULAR STRUCTURES OF THE BODY, E.G. STENTS ; ELECTRICITY ; FILTERS IMPLANTABLE INTO BLOOD VESSELS ; FIRST-AID KITS ; FOMENTATION ; HUMAN NECESSITIES ; HYGIENE ; INFORMATION STORAGE ; MEDICAL OR VETERINARY SCIENCE ; ORTHOPAEDIC, NURSING OR CONTRACEPTIVE DEVICES ; PHYSICS ; PROSTHESES ; STATIC STORES ; TREATMENT OR PROTECTION OF EYES OR EARS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160407&DB=EPODOC&CC=US&NR=2016099046A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160407&DB=EPODOC&CC=US&NR=2016099046A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIRAN TUVIA</creatorcontrib><title>TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION</title><description>Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v) a floating line connecting (i) a source of the third p-type FET, and (ii) a source of the fourth p-type FET, wherein: (a) the first data line is connected to: a gate of the second p-type FET, a gate of the second n-type FET, a drain of the third p-type FET, and a gate of the fourth p-type FET, and (b) the second data line is connected to: a gate of the first p-type FET, a gate of the first n-type FET, a drain of the fourth p-type FET, and a gate of the third p-type FET.</description><subject>BANDAGES, DRESSINGS OR ABSORBENT PADS</subject><subject>DEVICES PROVIDING PATENCY TO, OR PREVENTING COLLAPSING OF,TUBULAR STRUCTURES OF THE BODY, E.G. STENTS</subject><subject>ELECTRICITY</subject><subject>FILTERS IMPLANTABLE INTO BLOOD VESSELS</subject><subject>FIRST-AID KITS</subject><subject>FOMENTATION</subject><subject>HUMAN NECESSITIES</subject><subject>HYGIENE</subject><subject>INFORMATION STORAGE</subject><subject>MEDICAL OR VETERINARY SCIENCE</subject><subject>ORTHOPAEDIC, NURSING OR CONTRACEPTIVE DEVICES</subject><subject>PHYSICS</subject><subject>PROSTHESES</subject><subject>STATIC STORES</subject><subject>TREATMENT OR PROTECTION OF EYES OR EARS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAPcXX28PMMDHUNVnDzD1JwcQxxVAhyDXH1C_H091Pw9FPwdfX1D4pUcHb18QlWcAkN8vRzVwjwD3cNAkqGuAYFhQaAVPIwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQzMDS0sDEzNHQ2PiVAEAsvUt6g</recordid><startdate>20160407</startdate><enddate>20160407</enddate><creator>LIRAN TUVIA</creator><scope>EVB</scope></search><sort><creationdate>20160407</creationdate><title>TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION</title><author>LIRAN TUVIA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016099046A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BANDAGES, DRESSINGS OR ABSORBENT PADS</topic><topic>DEVICES PROVIDING PATENCY TO, OR PREVENTING COLLAPSING OF,TUBULAR STRUCTURES OF THE BODY, E.G. STENTS</topic><topic>ELECTRICITY</topic><topic>FILTERS IMPLANTABLE INTO BLOOD VESSELS</topic><topic>FIRST-AID KITS</topic><topic>FOMENTATION</topic><topic>HUMAN NECESSITIES</topic><topic>HYGIENE</topic><topic>INFORMATION STORAGE</topic><topic>MEDICAL OR VETERINARY SCIENCE</topic><topic>ORTHOPAEDIC, NURSING OR CONTRACEPTIVE DEVICES</topic><topic>PHYSICS</topic><topic>PROSTHESES</topic><topic>STATIC STORES</topic><topic>TREATMENT OR PROTECTION OF EYES OR EARS</topic><toplevel>online_resources</toplevel><creatorcontrib>LIRAN TUVIA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIRAN TUVIA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION</title><date>2016-04-07</date><risdate>2016</risdate><abstract>Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v) a floating line connecting (i) a source of the third p-type FET, and (ii) a source of the fourth p-type FET, wherein: (a) the first data line is connected to: a gate of the second p-type FET, a gate of the second n-type FET, a drain of the third p-type FET, and a gate of the fourth p-type FET, and (b) the second data line is connected to: a gate of the first p-type FET, a gate of the first n-type FET, a drain of the fourth p-type FET, and a gate of the third p-type FET.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2016099046A1 |
| source | esp@cenet |
| subjects | BANDAGES, DRESSINGS OR ABSORBENT PADS DEVICES PROVIDING PATENCY TO, OR PREVENTING COLLAPSING OF,TUBULAR STRUCTURES OF THE BODY, E.G. STENTS ELECTRICITY FILTERS IMPLANTABLE INTO BLOOD VESSELS FIRST-AID KITS FOMENTATION HUMAN NECESSITIES HYGIENE INFORMATION STORAGE MEDICAL OR VETERINARY SCIENCE ORTHOPAEDIC, NURSING OR CONTRACEPTIVE DEVICES PHYSICS PROSTHESES STATIC STORES TREATMENT OR PROTECTION OF EYES OR EARS |
| title | TECHNIQUES FOR DATA RETENTION IN MEMORY CELLS DURING POWER INTERRUPTION |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T08%3A55%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LIRAN%20TUVIA&rft.date=2016-04-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2016099046A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |