CMOS FABRICATION

A method of manufacturing a memory device includes an nMOS region and a pMOS region in a substrate. A first gate is defined within the nMOS region, and a second gate is defined in the pMOS region. Disposable spacers are simultaneously defined about the first and second gates. The nMOS and pMOS regio...

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Bibliographische Detailangaben
1. Verfasser: MATHEW SURAJ
Format: Patent
Sprache:eng
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