SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME
A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management...
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creator | PARK JINPYO |
description | A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management integrated circuit (PMIC), the PMIC supplying power to the processor from outside of processor. The power control signal includes a power off signal for interrupting the power supplied from the PMIC and the status data signal is transmitted to the PMIC together with the power off signal. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016062448A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016062448A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016062448A13</originalsourceid><addsrcrecordid>eNrjZPAPdvX1dPb3cwl1DvEPUnBxDfN0dtVRQBUNjgwOcfXVUXD0c1HwdQ3x8HdRcAMKAxWEBPn7-Hj6uSuEeLgqBDv6uvIwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQzMDMyMTEwtHQ2PiVAEAD-gvxA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME</title><source>esp@cenet</source><creator>PARK JINPYO</creator><creatorcontrib>PARK JINPYO</creatorcontrib><description>A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management integrated circuit (PMIC), the PMIC supplying power to the processor from outside of processor. The power control signal includes a power off signal for interrupting the power supplied from the PMIC and the status data signal is transmitted to the PMIC together with the power off signal.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160303&DB=EPODOC&CC=US&NR=2016062448A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160303&DB=EPODOC&CC=US&NR=2016062448A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PARK JINPYO</creatorcontrib><title>SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME</title><description>A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management integrated circuit (PMIC), the PMIC supplying power to the processor from outside of processor. The power control signal includes a power off signal for interrupting the power supplied from the PMIC and the status data signal is transmitted to the PMIC together with the power off signal.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAPdvX1dPb3cwl1DvEPUnBxDfN0dtVRQBUNjgwOcfXVUXD0c1HwdQ3x8HdRcAMKAxWEBPn7-Hj6uSuEeLgqBDv6uvIwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQzMDMyMTEwtHQ2PiVAEAD-gvxA</recordid><startdate>20160303</startdate><enddate>20160303</enddate><creator>PARK JINPYO</creator><scope>EVB</scope></search><sort><creationdate>20160303</creationdate><title>SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME</title><author>PARK JINPYO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016062448A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>PARK JINPYO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PARK JINPYO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME</title><date>2016-03-03</date><risdate>2016</risdate><abstract>A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management integrated circuit (PMIC), the PMIC supplying power to the processor from outside of processor. The power control signal includes a power off signal for interrupting the power supplied from the PMIC and the status data signal is transmitted to the PMIC together with the power off signal.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR CONTROLLING THE SAME |
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