RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY
A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | HYDE RODERICK A PASCH NICHOLAS F TEGREENE CLARENCE T |
description | A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit substrate. The security logic can include at least random number generator logic apportioned into two or more logic segments configured to perform at least one random number generator function in association with at least one memory segment of the plurality of memory segments. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present disclosure. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2016028544A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2016028544A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2016028544A13</originalsourceid><addsrcrecordid>eNrjZNAOcvRz8fdV8Av1dXINUnB39XMNcgzxD1JwC_VzDvH09wtW8PRT8HX19Q-K5GFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGZgZGFqYmJo6GxsSpAgAYKSYA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY</title><source>esp@cenet</source><creator>HYDE RODERICK A ; PASCH NICHOLAS F ; TEGREENE CLARENCE T</creator><creatorcontrib>HYDE RODERICK A ; PASCH NICHOLAS F ; TEGREENE CLARENCE T</creatorcontrib><description>A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit substrate. The security logic can include at least random number generator logic apportioned into two or more logic segments configured to perform at least one random number generator function in association with at least one memory segment of the plurality of memory segments. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present disclosure.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160128&DB=EPODOC&CC=US&NR=2016028544A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160128&DB=EPODOC&CC=US&NR=2016028544A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HYDE RODERICK A</creatorcontrib><creatorcontrib>PASCH NICHOLAS F</creatorcontrib><creatorcontrib>TEGREENE CLARENCE T</creatorcontrib><title>RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY</title><description>A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit substrate. The security logic can include at least random number generator logic apportioned into two or more logic segments configured to perform at least one random number generator function in association with at least one memory segment of the plurality of memory segments. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present disclosure.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAOcvRz8fdV8Av1dXINUnB39XMNcgzxD1JwC_VzDvH09wtW8PRT8HX19Q-K5GFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGZgZGFqYmJo6GxsSpAgAYKSYA</recordid><startdate>20160128</startdate><enddate>20160128</enddate><creator>HYDE RODERICK A</creator><creator>PASCH NICHOLAS F</creator><creator>TEGREENE CLARENCE T</creator><scope>EVB</scope></search><sort><creationdate>20160128</creationdate><title>RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY</title><author>HYDE RODERICK A ; PASCH NICHOLAS F ; TEGREENE CLARENCE T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2016028544A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>HYDE RODERICK A</creatorcontrib><creatorcontrib>PASCH NICHOLAS F</creatorcontrib><creatorcontrib>TEGREENE CLARENCE T</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HYDE RODERICK A</au><au>PASCH NICHOLAS F</au><au>TEGREENE CLARENCE T</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY</title><date>2016-01-28</date><risdate>2016</risdate><abstract>A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit substrate. The security logic can include at least random number generator logic apportioned into two or more logic segments configured to perform at least one random number generator function in association with at least one memory segment of the plurality of memory segments. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present disclosure.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2016028544A1 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T14%3A33%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HYDE%20RODERICK%20A&rft.date=2016-01-28&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2016028544A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |