RANDOM NUMBER GENERATOR FUNCTIONS IN MEMORY

A memory device includes but is not limited to an integrated circuit substrate, integrated circuit memory integrated onto the integrated circuit substrate and apportioned into a plurality of memory segments, and security logic integrated with the integrated circuit memory onto the integrated circuit substrate. The security logic can include at least random number generator logic apportioned into two or more logic segments configured to perform at least one random number generator function in association with at least one memory segment of the plurality of memory segments. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present disclosure.