SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

Circuits and methods for loopback testing are provided. A die incorporates a receiver (RX) to each transmitter (TX) as well as a TX to each RX. This architecture is applied to each bit so, e.g., a die that transmits or receives 32 data bits during operation would have 32 transceivers (one for each b...

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Hauptverfasser: KNOL STEPHEN ROBERT, JALILIZEINALI REZA, BRYAN THOMAS CLARK, WEE TIN TIN, LOKE ALVIN LENG SUN, PETERSON LUVERNE RAY
Format: Patent
Sprache:eng
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MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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creator KNOL STEPHEN ROBERT
JALILIZEINALI REZA
BRYAN THOMAS CLARK
WEE TIN TIN
LOKE ALVIN LENG SUN
PETERSON LUVERNE RAY
description Circuits and methods for loopback testing are provided. A die incorporates a receiver (RX) to each transmitter (TX) as well as a TX to each RX. This architecture is applied to each bit so, e.g., a die that transmits or receives 32 data bits during operation would have 32 transceivers (one for each bit). Focusing on one of the transceivers, a loopback architecture includes a TX data path and an RX data path that are coupled to each other through an external contact, such as a via at the transceiver. The die further includes a transmit clock tree feeding the TX data path and a receive clock tree feeding the RX data path. The transmit clock tree feeds the receive clock tree through a conductive clock node that is exposed on a surface of the die. Some systems further include a variable delay in the clock path.
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subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST
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