TESTING OF NON-VOLATILE MEMORY ARRAYS

A method of testing non-volatile memory arrays. A first test stage including at least a first stage read uses a first step size for setting current for BCC testing and/or voltage for VT testing for reading at least some memory cells. A second test stage including at least one second stage read uses...

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Bibliographische Detailangaben
Hauptverfasser: LEUNG NELSON KEI, TARSI TREVOR JOHN, BURGGRAF, III DANIEL ROBERT
Format: Patent
Sprache:eng
Schlagworte:
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