MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE

MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE

Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ARORA ANKUR, YAGATY AJIT, KARAMCHETI VIJAY, MONDAL SHIBABRATA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator ARORA ANKUR
YAGATY AJIT
KARAMCHETI VIJAY
MONDAL SHIBABRATA
description Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015331806A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015331806A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015331806A13</originalsourceid><addsrcrecordid>eNrjZDD2dfRzdPf0c1dwDI709XUNCfJ0VvB19fUPilQIjgwOcfUFSig4Kjg7Onu4Kri4hnk6u_IwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQ1NjY0MLAzNHQ2PiVAEAJCgnvw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE</title><source>esp@cenet</source><creator>ARORA ANKUR ; YAGATY AJIT ; KARAMCHETI VIJAY ; MONDAL SHIBABRATA</creator><creatorcontrib>ARORA ANKUR ; YAGATY AJIT ; KARAMCHETI VIJAY ; MONDAL SHIBABRATA</creatorcontrib><description>Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151119&amp;DB=EPODOC&amp;CC=US&amp;NR=2015331806A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151119&amp;DB=EPODOC&amp;CC=US&amp;NR=2015331806A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ARORA ANKUR</creatorcontrib><creatorcontrib>YAGATY AJIT</creatorcontrib><creatorcontrib>KARAMCHETI VIJAY</creatorcontrib><creatorcontrib>MONDAL SHIBABRATA</creatorcontrib><title>MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE</title><description>Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD2dfRzdPf0c1dwDI709XUNCfJ0VvB19fUPilQIjgwOcfUFSig4Kjg7Onu4Kri4hnk6u_IwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDQ1NjY0MLAzNHQ2PiVAEAJCgnvw</recordid><startdate>20151119</startdate><enddate>20151119</enddate><creator>ARORA ANKUR</creator><creator>YAGATY AJIT</creator><creator>KARAMCHETI VIJAY</creator><creator>MONDAL SHIBABRATA</creator><scope>EVB</scope></search><sort><creationdate>20151119</creationdate><title>MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE</title><author>ARORA ANKUR ; YAGATY AJIT ; KARAMCHETI VIJAY ; MONDAL SHIBABRATA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015331806A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>ARORA ANKUR</creatorcontrib><creatorcontrib>YAGATY AJIT</creatorcontrib><creatorcontrib>KARAMCHETI VIJAY</creatorcontrib><creatorcontrib>MONDAL SHIBABRATA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ARORA ANKUR</au><au>YAGATY AJIT</au><au>KARAMCHETI VIJAY</au><au>MONDAL SHIBABRATA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE</title><date>2015-11-19</date><risdate>2015</risdate><abstract>Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2015331806A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title MANAGING ASYMMETRIC MEMORY SYSTEM AS A CACHE DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T09%3A52%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ARORA%20ANKUR&rft.date=2015-11-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015331806A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true