FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL
Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | CHO JIN IACOPONI JOHN CAI XIUYU XIE RUILONG |
description | Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015311337A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015311337A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015311337A13</originalsourceid><addsrcrecordid>eNqNTssKwjAQ7MWDqP-w4FkwBvG8Ntt2IU1Kmvo4lSLxJFqoJ7_eBPwATzPMi5lnn4JNQR4UnTgnyG3dOG7ZlIDgK3I1arAXVgSOSrYGGtuyj4QUHMmfiUxMNtYlDWyRShA3AY2KhsYruSSzaTuNPg3X6Mkx6mU2uw-PKax-uMjW8UlebcL46sM0DrfwDO--a3dbsZdCSHlAIf9LfQGh6TrV</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL</title><source>esp@cenet</source><creator>CHO JIN ; IACOPONI JOHN ; CAI XIUYU ; XIE RUILONG</creator><creatorcontrib>CHO JIN ; IACOPONI JOHN ; CAI XIUYU ; XIE RUILONG</creatorcontrib><description>Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151029&DB=EPODOC&CC=US&NR=2015311337A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151029&DB=EPODOC&CC=US&NR=2015311337A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHO JIN</creatorcontrib><creatorcontrib>IACOPONI JOHN</creatorcontrib><creatorcontrib>CAI XIUYU</creatorcontrib><creatorcontrib>XIE RUILONG</creatorcontrib><title>FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL</title><description>Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNTssKwjAQ7MWDqP-w4FkwBvG8Ntt2IU1Kmvo4lSLxJFqoJ7_eBPwATzPMi5lnn4JNQR4UnTgnyG3dOG7ZlIDgK3I1arAXVgSOSrYGGtuyj4QUHMmfiUxMNtYlDWyRShA3AY2KhsYruSSzaTuNPg3X6Mkx6mU2uw-PKax-uMjW8UlebcL46sM0DrfwDO--a3dbsZdCSHlAIf9LfQGh6TrV</recordid><startdate>20151029</startdate><enddate>20151029</enddate><creator>CHO JIN</creator><creator>IACOPONI JOHN</creator><creator>CAI XIUYU</creator><creator>XIE RUILONG</creator><scope>EVB</scope></search><sort><creationdate>20151029</creationdate><title>FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL</title><author>CHO JIN ; IACOPONI JOHN ; CAI XIUYU ; XIE RUILONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015311337A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHO JIN</creatorcontrib><creatorcontrib>IACOPONI JOHN</creatorcontrib><creatorcontrib>CAI XIUYU</creatorcontrib><creatorcontrib>XIE RUILONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHO JIN</au><au>IACOPONI JOHN</au><au>CAI XIUYU</au><au>XIE RUILONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL</title><date>2015-10-29</date><risdate>2015</risdate><abstract>Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2015311337A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN A PORTION OF THE FIN AND A LAYER OF INSULATING MATERIAL |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T08%3A22%3A36IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHO%20JIN&rft.date=2015-10-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015311337A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |