PROGRAMMABLE LOGIC UNIT

Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is c...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BIRSAN LAURENTIU, DANIELSEN STEIN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator BIRSAN LAURENTIU
DANIELSEN STEIN
description Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015309957A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015309957A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015309957A13</originalsourceid><addsrcrecordid>eNrjZBAPCPJ3D3L09XV08nFV8PF393RWCPXzDOFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhqbGBpaWpuaOhsbEqQIAU9ogaw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PROGRAMMABLE LOGIC UNIT</title><source>esp@cenet</source><creator>BIRSAN LAURENTIU ; DANIELSEN STEIN</creator><creatorcontrib>BIRSAN LAURENTIU ; DANIELSEN STEIN</creatorcontrib><description>Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; PULSE TECHNIQUE</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151029&amp;DB=EPODOC&amp;CC=US&amp;NR=2015309957A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151029&amp;DB=EPODOC&amp;CC=US&amp;NR=2015309957A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BIRSAN LAURENTIU</creatorcontrib><creatorcontrib>DANIELSEN STEIN</creatorcontrib><title>PROGRAMMABLE LOGIC UNIT</title><description>Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAPCPJ3D3L09XV08nFV8PF393RWCPXzDOFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhqbGBpaWpuaOhsbEqQIAU9ogaw</recordid><startdate>20151029</startdate><enddate>20151029</enddate><creator>BIRSAN LAURENTIU</creator><creator>DANIELSEN STEIN</creator><scope>EVB</scope></search><sort><creationdate>20151029</creationdate><title>PROGRAMMABLE LOGIC UNIT</title><author>BIRSAN LAURENTIU ; DANIELSEN STEIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015309957A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>BIRSAN LAURENTIU</creatorcontrib><creatorcontrib>DANIELSEN STEIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BIRSAN LAURENTIU</au><au>DANIELSEN STEIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PROGRAMMABLE LOGIC UNIT</title><date>2015-10-29</date><risdate>2015</risdate><abstract>Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2015309957A1
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
title PROGRAMMABLE LOGIC UNIT
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T20%3A01%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BIRSAN%20LAURENTIU&rft.date=2015-10-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015309957A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true