SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER

A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact isla...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: CHEUNG KA WA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHEUNG KA WA
description A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015162215A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015162215A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015162215A13</originalsourceid><addsrcrecordid>eNrjZLAIjgwOcfVVcPRzUfB1DfHwd1Fw8w9S8HX0C3VzdA4JDfL0c1dwVHBzdArydHYMcXVRcHYMCvJ0DeJhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhqaGZkZGhqaOhsbEqQIA70ApJw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER</title><source>esp@cenet</source><creator>CHEUNG KA WA</creator><creatorcontrib>CHEUNG KA WA</creatorcontrib><description>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</description><language>eng</language><subject>APPARATUS THEREFOR ; BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; CHEMISTRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; ELECTROFORMING ; ELECTROLYTIC OR ELECTROPHORETIC PROCESSES ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; METALLURGY ; PRINTED CIRCUITS ; PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150611&amp;DB=EPODOC&amp;CC=US&amp;NR=2015162215A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150611&amp;DB=EPODOC&amp;CC=US&amp;NR=2015162215A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEUNG KA WA</creatorcontrib><title>SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER</title><description>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</description><subject>APPARATUS THEREFOR</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>CHEMISTRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>ELECTROFORMING</subject><subject>ELECTROLYTIC OR ELECTROPHORETIC PROCESSES</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>METALLURGY</subject><subject>PRINTED CIRCUITS</subject><subject>PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAIjgwOcfVVcPRzUfB1DfHwd1Fw8w9S8HX0C3VzdA4JDfL0c1dwVHBzdArydHYMcXVRcHYMCvJ0DeJhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhqaGZkZGhqaOhsbEqQIA70ApJw</recordid><startdate>20150611</startdate><enddate>20150611</enddate><creator>CHEUNG KA WA</creator><scope>EVB</scope></search><sort><creationdate>20150611</creationdate><title>SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER</title><author>CHEUNG KA WA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015162215A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>APPARATUS THEREFOR</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>CHEMISTRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>ELECTROFORMING</topic><topic>ELECTROLYTIC OR ELECTROPHORETIC PROCESSES</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>METALLURGY</topic><topic>PRINTED CIRCUITS</topic><topic>PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEUNG KA WA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEUNG KA WA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER</title><date>2015-06-11</date><risdate>2015</risdate><abstract>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2015162215A1
source esp@cenet
subjects APPARATUS THEREFOR
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
CHEMISTRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROFORMING
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
METALLURGY
PRINTED CIRCUITS
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS
SEMICONDUCTOR DEVICES
title SYSTEM AND METHOD FOR MANUFACTURING A FABRICATED CARRIER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T07%3A38%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHEUNG%20KA%20WA&rft.date=2015-06-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015162215A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true