SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR

Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determ...

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Hauptverfasser:	RANGAN VENKAT, LEVIN JEFFREY ALEXANDER, WEGRZYN JAN KRZYS, DANIELS JOHN PAUL
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	RANGAN VENKAT LEVIN JEFFREY ALEXANDER WEGRZYN JAN KRZYS DANIELS JOHN PAUL
description	Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015106317A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015106317A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015106317A13</originalsourceid><addsrcrecordid>eNrjZDAM9nAMcnVR8HX19Q-KVHAMcvbwDHF1DgkNclVw8w9ScFTwcw0NcvRRCPb0DfVxDPEP4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGpoYGZsaG5o6GxsSpAgDyHCeC</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR</title><source>esp@cenet</source><creator>RANGAN VENKAT ; LEVIN JEFFREY ALEXANDER ; WEGRZYN JAN KRZYS ; DANIELS JOHN PAUL</creator><creatorcontrib>RANGAN VENKAT ; LEVIN JEFFREY ALEXANDER ; WEGRZYN JAN KRZYS ; DANIELS JOHN PAUL</creatorcontrib><description>Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.</description><language>eng</language><subject>CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150416&DB=EPODOC&CC=US&NR=2015106317A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150416&DB=EPODOC&CC=US&NR=2015106317A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RANGAN VENKAT</creatorcontrib><creatorcontrib>LEVIN JEFFREY ALEXANDER</creatorcontrib><creatorcontrib>WEGRZYN JAN KRZYS</creatorcontrib><creatorcontrib>DANIELS JOHN PAUL</creatorcontrib><title>SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR</title><description>Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.</description><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAM9nAMcnVR8HX19Q-KVHAMcvbwDHF1DgkNclVw8w9ScFTwcw0NcvRRCPb0DfVxDPEP4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGpoYGZsaG5o6GxsSpAgDyHCeC</recordid><startdate>20150416</startdate><enddate>20150416</enddate><creator>RANGAN VENKAT</creator><creator>LEVIN JEFFREY ALEXANDER</creator><creator>WEGRZYN JAN KRZYS</creator><creator>DANIELS JOHN PAUL</creator><scope>EVB</scope></search><sort><creationdate>20150416</creationdate><title>SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR</title><author>RANGAN VENKAT ; LEVIN JEFFREY ALEXANDER ; WEGRZYN JAN KRZYS ; DANIELS JOHN PAUL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015106317A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>RANGAN VENKAT</creatorcontrib><creatorcontrib>LEVIN JEFFREY ALEXANDER</creatorcontrib><creatorcontrib>WEGRZYN JAN KRZYS</creatorcontrib><creatorcontrib>DANIELS JOHN PAUL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>RANGAN VENKAT</au><au>LEVIN JEFFREY ALEXANDER</au><au>WEGRZYN JAN KRZYS</au><au>DANIELS JOHN PAUL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR</title><date>2015-04-16</date><risdate>2015</risdate><abstract>Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.</abstract><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T20%3A37%3A23IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=RANGAN%20VENKAT&rft.date=2015-04-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015106317A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true