Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof

Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof

In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip...

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Hauptverfasser: OTREMBA RALF, HOEGLAUER JOSEF, SCHLOEGEL XAVER, SCHREDL JUERGEN, SCHIESS KLAUS
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator OTREMBA RALF
HOEGLAUER JOSEF
SCHLOEGEL XAVER
SCHREDL JUERGEN
SCHIESS KLAUS
description In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015060878A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015060878A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015060878A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAQgOEuDqK-w4GzkCpqVxFDBwtC6lyO5NIG01xJUp9fBx_A6R--f1koRaPTHMysM0d4oH5hTwlqfLvQQzP77CZPcCc0ICOOX8NgoKE8sEnAFiTHEbPjAO1Akdiui4VFn2jz66rYylt7rXc0cUdpQk2BcvdUe1EexUlU5-pSHv67PvK4OMs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof</title><source>esp@cenet</source><creator>OTREMBA RALF ; HOEGLAUER JOSEF ; SCHLOEGEL XAVER ; SCHREDL JUERGEN ; SCHIESS KLAUS</creator><creatorcontrib>OTREMBA RALF ; HOEGLAUER JOSEF ; SCHLOEGEL XAVER ; SCHREDL JUERGEN ; SCHIESS KLAUS</creatorcontrib><description>In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150305&amp;DB=EPODOC&amp;CC=US&amp;NR=2015060878A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150305&amp;DB=EPODOC&amp;CC=US&amp;NR=2015060878A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OTREMBA RALF</creatorcontrib><creatorcontrib>HOEGLAUER JOSEF</creatorcontrib><creatorcontrib>SCHLOEGEL XAVER</creatorcontrib><creatorcontrib>SCHREDL JUERGEN</creatorcontrib><creatorcontrib>SCHIESS KLAUS</creatorcontrib><title>Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof</title><description>In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQgOEuDqK-w4GzkCpqVxFDBwtC6lyO5NIG01xJUp9fBx_A6R--f1koRaPTHMysM0d4oH5hTwlqfLvQQzP77CZPcCc0ICOOX8NgoKE8sEnAFiTHEbPjAO1Akdiui4VFn2jz66rYylt7rXc0cUdpQk2BcvdUe1EexUlU5-pSHv67PvK4OMs</recordid><startdate>20150305</startdate><enddate>20150305</enddate><creator>OTREMBA RALF</creator><creator>HOEGLAUER JOSEF</creator><creator>SCHLOEGEL XAVER</creator><creator>SCHREDL JUERGEN</creator><creator>SCHIESS KLAUS</creator><scope>EVB</scope></search><sort><creationdate>20150305</creationdate><title>Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof</title><author>OTREMBA RALF ; HOEGLAUER JOSEF ; SCHLOEGEL XAVER ; SCHREDL JUERGEN ; SCHIESS KLAUS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015060878A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OTREMBA RALF</creatorcontrib><creatorcontrib>HOEGLAUER JOSEF</creatorcontrib><creatorcontrib>SCHLOEGEL XAVER</creatorcontrib><creatorcontrib>SCHREDL JUERGEN</creatorcontrib><creatorcontrib>SCHIESS KLAUS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OTREMBA RALF</au><au>HOEGLAUER JOSEF</au><au>SCHLOEGEL XAVER</au><au>SCHREDL JUERGEN</au><au>SCHIESS KLAUS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof</title><date>2015-03-05</date><risdate>2015</risdate><abstract>In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T15%3A53%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=OTREMBA%20RALF&rft.date=2015-03-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015060878A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true