APPARATUS AND METHOD FOR SMART VCC TRIP POINT DESIGN FOR TESTABILITY

APPARATUS AND METHOD FOR SMART VCC TRIP POINT DESIGN FOR TESTABILITY

An apparatus and method for testing is provided. An integrated circuit includes a comparison circuit that is arranged to trip based on a power supply signal reaching a trip point. The integrated circuit also includes an analog-to-digital converter that is arranged to convert the power supply signal...

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Hauptverfasser: MEEOO ONG, CHING-KOOI HOR, BOON-WENG TEOH
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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creator MEEOO ONG
CHING-KOOI HOR
BOON-WENG TEOH
description An apparatus and method for testing is provided. An integrated circuit includes a comparison circuit that is arranged to trip based on a power supply signal reaching a trip point. The integrated circuit also includes an analog-to-digital converter that is arranged to convert the power supply signal into a digital signal. The integrated circuit also includes a storage component that stores a digital value associated with the digital signal, and provides the power supply value at an output pin of the integrated circuit. The integrated circuit includes a latch that is coupled between the analog-to-digital converter and the storage component. The latch is arranged to open when the comparison circuit trips, such that, when the comparison circuit trips, the storage component continues to store a digital value such that the digital value corresponds to the voltage associated with the power supply signal when the comparison circuit tripped.
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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title APPARATUS AND METHOD FOR SMART VCC TRIP POINT DESIGN FOR TESTABILITY
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