SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME

A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxia...

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Hauptverfasser: PARK KEUM SEOK, KANG SUNGKWAN, LEE BYEONGCHAN, KANG SANGBOM, KIM NAM-KYU
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creator PARK KEUM SEOK
KANG SUNGKWAN
LEE BYEONGCHAN
KANG SANGBOM
KIM NAM-KYU
description A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2015031183A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2015031183A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2015031183A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAQANAsDqL-w4Gz0FgE13i5NAdtArnEtRSJk2ih_j8i-AFOb3lrlYUGxhhswRwTWLoykgAH7Ivl0IFwz8iWIFHHMQiYYGGg7KMViA6cuSRGk783ewIxA23V6j49lrr7uVF7Rxn9oc6vsS7zdKvP-h6LHBt9alqtz63R7X_rA-fOMNg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME</title><source>esp@cenet</source><creator>PARK KEUM SEOK ; KANG SUNGKWAN ; LEE BYEONGCHAN ; KANG SANGBOM ; KIM NAM-KYU</creator><creatorcontrib>PARK KEUM SEOK ; KANG SUNGKWAN ; LEE BYEONGCHAN ; KANG SANGBOM ; KIM NAM-KYU</creatorcontrib><description>A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150129&amp;DB=EPODOC&amp;CC=US&amp;NR=2015031183A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150129&amp;DB=EPODOC&amp;CC=US&amp;NR=2015031183A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PARK KEUM SEOK</creatorcontrib><creatorcontrib>KANG SUNGKWAN</creatorcontrib><creatorcontrib>LEE BYEONGCHAN</creatorcontrib><creatorcontrib>KANG SANGBOM</creatorcontrib><creatorcontrib>KIM NAM-KYU</creatorcontrib><title>SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME</title><description>A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQANAsDqL-w4Gz0FgE13i5NAdtArnEtRSJk2ih_j8i-AFOb3lrlYUGxhhswRwTWLoykgAH7Ivl0IFwz8iWIFHHMQiYYGGg7KMViA6cuSRGk783ewIxA23V6j49lrr7uVF7Rxn9oc6vsS7zdKvP-h6LHBt9alqtz63R7X_rA-fOMNg</recordid><startdate>20150129</startdate><enddate>20150129</enddate><creator>PARK KEUM SEOK</creator><creator>KANG SUNGKWAN</creator><creator>LEE BYEONGCHAN</creator><creator>KANG SANGBOM</creator><creator>KIM NAM-KYU</creator><scope>EVB</scope></search><sort><creationdate>20150129</creationdate><title>SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME</title><author>PARK KEUM SEOK ; KANG SUNGKWAN ; LEE BYEONGCHAN ; KANG SANGBOM ; KIM NAM-KYU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2015031183A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>PARK KEUM SEOK</creatorcontrib><creatorcontrib>KANG SUNGKWAN</creatorcontrib><creatorcontrib>LEE BYEONGCHAN</creatorcontrib><creatorcontrib>KANG SANGBOM</creatorcontrib><creatorcontrib>KIM NAM-KYU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PARK KEUM SEOK</au><au>KANG SUNGKWAN</au><au>LEE BYEONGCHAN</au><au>KANG SANGBOM</au><au>KIM NAM-KYU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME</title><date>2015-01-29</date><risdate>2015</risdate><abstract>A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T18%3A10%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=PARK%20KEUM%20SEOK&rft.date=2015-01-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2015031183A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true