HYBRID MULTI-LEVEL MEMORY ARCHITECTURE

Hybrid multi-level memory architecture technologies are described. A System on Chip (SOC) includes multiple functional units and a multi-level memory controller (MLMC) coupled to the functional units. The MLMC is coupled to a hybrid multi-level memory architecture including a first-level dynamic ran...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	FANNING BLAISE, BERKOVITS ARIEL, GREENFIELD ZVIKA, FEEKES DANNIE G, RAIKIN SHLOMO, BOLOTIN EVGENY, SHIFER ERAN, RAY JOYDEEP, MANDELBLAT JULIUS
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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