BUFFER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT

BUFFER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT

A buffer circuit section receives an input clock, and outputs an output clock by wave-shaping the input clock, a measurement circuit section measures a first pulse width at a first potential level of the output clock and a second pulse width at a second potential level of the output clock, and an ad...

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1. Verfasser: INAGAWA RYOICHI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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description A buffer circuit section receives an input clock, and outputs an output clock by wave-shaping the input clock, a measurement circuit section measures a first pulse width at a first potential level of the output clock and a second pulse width at a second potential level of the output clock, and an adjustment circuit section adjusts a ratio between the first pulse width and the second pulse width by varying a drive capability of the buffer circuit section on the basis of the measurement result of the measurement circuit section.
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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title BUFFER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
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