PROCESSING UNIT AND ERROR PROCESSING METHOD

A processing unit of the embodiments includes an instruction memory that holds a plurality of instructions specified by addresses, and that cannot execute read and write operations concurrently, an error correction circuit that detects and corrects an error in the instruction, a program counter, an...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MIYAMORI TAKASHI, SANO TORU
Format: Patent
Sprache:eng
Schlagworte:
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