Non-volatile Programmable Memory Cell and Array for Programmable Logic Array
A non-volatile programmable memory cell suitable for use in a programmable logic array includes a non-volatile MOS transistor of a first conductivity type in series with a volatile MOS transistor of a second conductivity type. The non-volatile MOS transistor may be a floating gate transistor, such a...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | MCCOLLUM JOHN HAWLEY FRANK WILKINSON LESLIE RICHARD DHAOUI FETHI |
| description | A non-volatile programmable memory cell suitable for use in a programmable logic array includes a non-volatile MOS transistor of a first conductivity type in series with a volatile MOS transistor of a second conductivity type. The non-volatile MOS transistor may be a floating gate transistor, such as a flash transistor, or may be another type of non-volatile transistor such as a floating charge-trapping SONOS, MONOS transistor, or a nano-crystal transistor. A volatile MOS transistor, an inverter, or a buffer may be driven by coupling its gate or input to the common connection between the non-volatile MOS transistor and the volatile MOS transistor. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2014138755A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2014138755A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2014138755A13</originalsourceid><addsrcrecordid>eNrjZPDxy8_TLcvPSSzJzElVCCjKTy9KzM1NTAJyfFNz84sqFZxTc3IUEvNSFByLihIrFdLyi1CV-eSnZyZDJHkYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBoYmhsYW5qamjoTFxqgAkOjYY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Non-volatile Programmable Memory Cell and Array for Programmable Logic Array</title><source>esp@cenet</source><creator>MCCOLLUM JOHN ; HAWLEY FRANK ; WILKINSON LESLIE RICHARD ; DHAOUI FETHI</creator><creatorcontrib>MCCOLLUM JOHN ; HAWLEY FRANK ; WILKINSON LESLIE RICHARD ; DHAOUI FETHI</creatorcontrib><description>A non-volatile programmable memory cell suitable for use in a programmable logic array includes a non-volatile MOS transistor of a first conductivity type in series with a volatile MOS transistor of a second conductivity type. The non-volatile MOS transistor may be a floating gate transistor, such as a flash transistor, or may be another type of non-volatile transistor such as a floating charge-trapping SONOS, MONOS transistor, or a nano-crystal transistor. A volatile MOS transistor, an inverter, or a buffer may be driven by coupling its gate or input to the common connection between the non-volatile MOS transistor and the volatile MOS transistor.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140522&DB=EPODOC&CC=US&NR=2014138755A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140522&DB=EPODOC&CC=US&NR=2014138755A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MCCOLLUM JOHN</creatorcontrib><creatorcontrib>HAWLEY FRANK</creatorcontrib><creatorcontrib>WILKINSON LESLIE RICHARD</creatorcontrib><creatorcontrib>DHAOUI FETHI</creatorcontrib><title>Non-volatile Programmable Memory Cell and Array for Programmable Logic Array</title><description>A non-volatile programmable memory cell suitable for use in a programmable logic array includes a non-volatile MOS transistor of a first conductivity type in series with a volatile MOS transistor of a second conductivity type. The non-volatile MOS transistor may be a floating gate transistor, such as a flash transistor, or may be another type of non-volatile transistor such as a floating charge-trapping SONOS, MONOS transistor, or a nano-crystal transistor. A volatile MOS transistor, an inverter, or a buffer may be driven by coupling its gate or input to the common connection between the non-volatile MOS transistor and the volatile MOS transistor.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPDxy8_TLcvPSSzJzElVCCjKTy9KzM1NTAJyfFNz84sqFZxTc3IUEvNSFByLihIrFdLyi1CV-eSnZyZDJHkYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBoYmhsYW5qamjoTFxqgAkOjYY</recordid><startdate>20140522</startdate><enddate>20140522</enddate><creator>MCCOLLUM JOHN</creator><creator>HAWLEY FRANK</creator><creator>WILKINSON LESLIE RICHARD</creator><creator>DHAOUI FETHI</creator><scope>EVB</scope></search><sort><creationdate>20140522</creationdate><title>Non-volatile Programmable Memory Cell and Array for Programmable Logic Array</title><author>MCCOLLUM JOHN ; HAWLEY FRANK ; WILKINSON LESLIE RICHARD ; DHAOUI FETHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2014138755A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>MCCOLLUM JOHN</creatorcontrib><creatorcontrib>HAWLEY FRANK</creatorcontrib><creatorcontrib>WILKINSON LESLIE RICHARD</creatorcontrib><creatorcontrib>DHAOUI FETHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MCCOLLUM JOHN</au><au>HAWLEY FRANK</au><au>WILKINSON LESLIE RICHARD</au><au>DHAOUI FETHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Non-volatile Programmable Memory Cell and Array for Programmable Logic Array</title><date>2014-05-22</date><risdate>2014</risdate><abstract>A non-volatile programmable memory cell suitable for use in a programmable logic array includes a non-volatile MOS transistor of a first conductivity type in series with a volatile MOS transistor of a second conductivity type. The non-volatile MOS transistor may be a floating gate transistor, such as a flash transistor, or may be another type of non-volatile transistor such as a floating charge-trapping SONOS, MONOS transistor, or a nano-crystal transistor. A volatile MOS transistor, an inverter, or a buffer may be driven by coupling its gate or input to the common connection between the non-volatile MOS transistor and the volatile MOS transistor.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2014138755A1 |
| source | esp@cenet |
| subjects | ELECTRICITY |
| title | Non-volatile Programmable Memory Cell and Array for Programmable Logic Array |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T19%3A56%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MCCOLLUM%20JOHN&rft.date=2014-05-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2014138755A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |